Displaying 20 results from an estimated 44 matches for "instprinter".
2014 Apr 03
5
[LLVMdev] comparing .o files from different build trees
...serts/X86ISelDAGToDAG.o ../../recurse2be/build/./lib/Target/X86/Release+Asserts/X86ISelDAGToDAG.o differ: byte 271126, line 2999
./lib/Target/X86/Release+Asserts/X86RegisterInfo.o ../../recurse2be/build/./lib/Target/X86/Release+Asserts/X86RegisterInfo.o differ: byte 33493, line 108
./lib/Target/X86/InstPrinter/Release+Asserts/X86ATTInstPrinter.o ../../recurse2be/build/./lib/Target/X86/InstPrinter/Release+Asserts/X86ATTInstPrinter.o differ: byte 93564, line 89
./lib/Target/X86/InstPrinter/Release+Asserts/X86IntelInstPrinter.o ../../recurse2be/build/./lib/Target/X86/InstPrinter/Release+Asserts/X86IntelInst...
2019 Mar 25
2
Printing PC-relative offsets - how to get the instruction length?
Hi
In my MC6809 backend, in llvm/lib/Target/MC6809/InstPrinter/MC6809InstPrinter.cpp, I have the routine
void MC6809InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
ZZ
if (Op.isImm()) {
int64_t Imm = Op.getImm() + 2; <<<========================
O &...
2013 Sep 17
0
[LLVMdev] [patch] alias instruction for Intel syntax
this patch prints out alias instruction for Intel sytax in diasm code.
thanks.
Jun
diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
index e7e7b15..b9f78a5 100644
--- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
+++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
@@ -39,7 +39,8 @@ void X86IntelInstPrinter::printInst(const MCInst *MI,
raw_os...
2017 Apr 12
2
[RFC] Nios II backend
...nformation (Nios2RegisterInfo.cpp, Nios2RegisterInfo.h, Nios2RegisterInfo.td)
- ISA specification (Nios2InstrFormats.td, Nios2InstrInfo.cpp, Nios2InstrInfo.h, Nios2InstrInfo.td)
- GlobalISel (At the moment I use DAG selector, but work on porting to GlobalISel is already started)
- Assembly printer (InstPrinter/Nios2InstPrinter.h, InstPrinter/Nios2InstPrinter.cpp, Nios2AsmPrinter.cpp, Nios2AsmPrinter.h, MCTargetDesc/Nios2MCAsmInfo.cpp, MCTargetDesc/Nios2MCAsmInfo.h, .)
- Target triple registration in clang
- Built-in functions (clang and codegen part)
- New options support (clang driver and codegen part)...
2011 Jun 21
1
[LLVMdev] AsmPrinter directory
Hi,
While trying to debug a linking problem related to AsmPrinter, I found
following lines in {srcdir}/configure file.
if test -f ${srcdir}/lib/Target/${target_to_build}/*AsmPrinter.cpp ; then
LLVM_ENUM_ASM_PRINTERS="LLVM_ASM_PRINTER($target_to_build)
$LLVM_ENUM_ASM_PRINTERS";
It looks like the AsmPrinters are enumerated only if *AsmPrinter.cpp
file is present in
2011 Jul 06
0
[LLVMdev] MCInstPrinter::printRegName
I have a question regarding implementation of subclasses of MCInstPrinter.
I am implementing Machine IR layer to MC layer lowering for Mips.
What's the best way to print the value of "Register" in the following code
in MCAsmStreamer::EmitRegisterName? Do I have to convert the LLVM register
number back to its corresponding dwarf register number in function...
2011 Jun 22
0
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
...d likely provide a good starting point so that the support wouldn't have to be done from scratch.
I will try to find those pre-v3 patches.
In meantime I wrote a patch which changes to old mnemonics for shift instructions.
This fixes compiling on the freebsd.
--- a/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -44,17 +44,18 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
const MCOperand &MO2 = MI->getOperand(2);
const MCOperand &MO3 = MI->getOperand(3);
- O <<...
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
On Jun 22, 2011, at 9:00 AM, Renato Golin wrote:
> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote:
>>> This sounds like a dead end as newer binutils are GPLv3.
>>
>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.
2017 Feb 04
2
How to get assembly opcode mnemonic(s) corresponding to a MachineInstr?
...assembly operation takes is
openly available.
Is there any straightforward way of getting the opcode mnemonics
corresponding to a MachineInstr? I've gone through this thread
(http://lists.llvm.org/pipermail/llvm-dev/2012-October/054818.html)
and I understand I need to modify the AsmPrinter or InstPrinter in
some way, but am not sure how.
Thank you for your help!
Radhika
2018 Jun 30
2
Using BuildMI to insert Intel MPX instruction BNDCU failed
...on<llvm::MCOperand,
void>::operator[](unsigned long) const
/home/shenyouren/workspace/llvm/include/llvm/ADT/SmallVector.h:154:0
#10 0x00000000016b63bb llvm::MCInst::getOperand(unsigned int) const
/home/shenyouren/workspace/llvm/include/llvm/MC/MCInst.h:182:0
#11 0x00000000026695fd llvm::X86ATTInstPrinter::printOperand(llvm::MCInst
const*, unsigned int, llvm::raw_ostream&)
/home/shenyouren/workspace/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp:185:0
#12 0x0000000002664c06
llvm::X86ATTInstPrinter::printInstruction(llvm::MCInst const*,
llvm::raw_ostream&)
/home/shenyouren/workspace/bu...
2013 Oct 10
0
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
...==========================
> --- lib/Target/R600/AMDGPUMCInstLower.cpp (revision 192067)
> +++ lib/Target/R600/AMDGPUMCInstLower.cpp (working copy)
> @@ -15,14 +15,19 @@
>
> #include "AMDGPUMCInstLower.h"
> #include "AMDGPUAsmPrinter.h"
> +#include "InstPrinter/AMDGPUInstPrinter.h"
> #include "R600InstrInfo.h"
> #include "llvm/CodeGen/MachineBasicBlock.h"
> #include "llvm/CodeGen/MachineInstr.h"
> #include "llvm/IR/Constants.h"
> +#include "llvm/MC/MCCodeEmitter.h"
> #include &q...
2013 Oct 28
0
[LLVMdev] Are Opcode and register mappings exposed anywhere?
See the source here:
https://github.com/earl/llvm-mirror/blob/master/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp.
It looks like getRegisterName might do what you want, but I don't know
where it's coming from. (Whether it's a function or a member of a super
class. Hopefully, if it's a member, it's public.)
PS Sorry for the duplicate, Stephen. I forgot to CC the list...
2015 Mar 18
6
[LLVMdev] string input for the integrated assembler
Short version: If the integrated assembler accepted assembly strings
as input, more targets could take advantage of integrated assembly.
The longer version:
For a given assembly statement, my out-of-tree target has complex
instruction selection logic -- more so than the in-tree targets. This
target uses variable length instructions and a laborious hierarchy of
tblgen AsmOperands to do the job.
2013 Oct 10
2
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
Hi,
This patch adds R600/SI disassembly text to compiled object files, when
a code dump is requested, to assist debugging in Mesa clients.
Here's an example of the output in a Mesa client with a corresponding
patch and RADEON_DUMP_SHADERS set:
Shader Disassembly:
S_WQM_B64 EXEC, EXEC ; BEFE0A7E
S_MOV_B32 M0, SGPR6 ; BEFC0306
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
I'm iterating over MCInsts and I'd like to examine particular instructions. For example, I'd like to look at all x86 CALL64m instructions. I may be missing something, but it seems like my only option is to use MCInstPrinter::getOpcodeName and compare strings. (Of course, I could iterate through the opcodes and build up a table of the ones I'm interested in to avoid string comparisons.)
Register mappings to names seem to be even worse. It appears you have to go through MCInstPrinter::printRegName(raw_ostream&,...
2013 Oct 28
2
[LLVMdev] Are Opcode and register mappings exposed anywhere?
On Oct 28, 2013, at 2:02 PM, Tyler Hardin <tghardin1 at catamount.wcu.edu> wrote:
> See the source here: https://github.com/earl/llvm-mirror/blob/master/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp. It looks like getRegisterName might do what you want, but I don't know where it's coming from. (Whether it's a function or a member of a super class. Hopefully, if it's a member, it's public.)
Looks like X86ATTInstPrinter::getRegisterName() and X86Intel...
2012 Oct 12
0
[LLVMdev] Newbie question for registering new target with LLVM
...aces and gradually depend on all the real
features:
+ RxTargetMachine.cpp is small, but central. It's where you register
the passes that actually do the work. If you can get things to compile
with these functions doing their job you should have stubs for most of
the necessary components.
+ InstPrinter/XXXInstPrinter.cpp: This is the main entry for the
so-called MC instruction printing, which is the good way to do things.
It's theoretically possible to get your instructions printing without
creating this, but you'd be Doing It Wrong.
But most importantly, have fun and don't be afraid...
2011 Aug 04
3
[LLVMdev] Multiple one-line bugs in LLVM
...ByteValues.size()/2) {
if (ByteValues.size()-1-DestByteNo != InputByteNo)
return true;
} else {
if (ByteValues.size()-1-DestByteNo != InputByteNo)
return true;
}
Note that 'then' and 'else' are the same. It can be a problem or can not.
----
lib/Target/X86/InstPrinter/X86InstComments.cpp:208
case X86::VPERMILPSri:
DecodeVPERMILPSMask(4, MI->getOperand(2).getImm(),
ShuffleMask);
Src1Name = getRegName(MI->getOperand(0).getReg());
case X86::VPERMILPSYri:
DecodeVPERMILPSMask(8, MI->getOperand(2).getImm(),
...
2018 Sep 22
2
can't build/run after adding lib to Fibonacci example, even reverting the complete llvm tree does not help
...osoft Visual
Studio\2017\Community\VC\Auxiliary\Build\vcvars64.bat"
cd llvm-build
cmake --build . --config Debug --target Fibonacci
building Fibonacci example works BUT X86CommonTableGen get rebuild again?
Das Projekt
"D:\projects\fun\jit_tests\clang_from_src\llvm-build\lib\Target\X86\InstPrinter\LLVMX86AsmPrinter.vcxproj"
(37) erstellt
"D:\projects\fun\jit_tests\clang_from_src\llvm-build\lib\Target\X86\X86CommonTableGen.vcxproj"
(38) auf Knoten "1" (Standardziele).
InitializeBuildStatus:
"x64\Debug\X86CommonTableGen\X86Commo.1917F16D.tlog\unsuccessfulbuild&...
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
...This fixes compiling on the freebsd.
If this is really the only issue you're seeing, we may be lucky and your binutils already have support for lots of the changes necessary to handle llvm assembly. Let's cross our fingers that's the case.
>
> --- a/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
> +++ b/contrib/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
> @@ -44,17 +44,18 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
> const MCOperand &MO2 = MI->getOperand(2);
> const MCOperand &MO3 = MI->getOperand(3)...