Displaying 7 results from an estimated 7 matches for "instert".
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2007 Apr 23
2
[LLVMdev] Register based vector insert/extract
...constraint through the operands from the DAG. There would need to be
some way to specify that the SDOperand is referencing a subvalue of
the produced value (perhaps a subclass of SDOperand?). This would
allow the register allocator to try to use the sub/super register
sets to perform the instert/extract.
Is any of this kind of work planned? The addition of those
MRegisterInfo functions has me curious...
--
Christopher Lamb
2004 Sep 30
1
Problem with _new_ if class "lm" in object representatio n.
...t I like.*
Hence, I do not want to use any in this case.
I think that allowing to assing NULL to a slot will solve some problems
which I have with S4 so far.
a) How to express that an a slot content was not assigned so far? J.C.
suggest to use character(0), lm(1~1) etc. The problem I have with
insterting lm(1~1) in slot mod in my class Ctest are that I have 100000
instances of object Ctest. At initialization everyone contains an object
lm(1~1). But please note the following.
> x<-lm(1~1)
> object.size(x)
[1] 6388
> object.size(NULL)
[1] 0
Unfortunately S4 do not have referenc...
2007 Apr 23
0
[LLVMdev] Register based vector insert/extract
On Apr 23, 2007, at 1:17 PM, Christopher Lamb wrote:
>
> On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote:
>
>> On Mon, 23 Apr 2007, Christopher Lamb wrote:
>>> How can one let the back end know how to insert and extract
>>> elements of
>>> a vector through sub-register copies? I'm at a loss how to do
>>> this...
>>
>> You
2007 Apr 23
2
[LLVMdev] Register based vector insert/extract
On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote:
> On Mon, 23 Apr 2007, Christopher Lamb wrote:
>> How can one let the back end know how to insert and extract
>> elements of
>> a vector through sub-register copies? I'm at a loss how to do this...
>
> You probably want to custom lower the insertelement/extractelement
> operations for the cases you support.
2007 Apr 23
0
[LLVMdev] Register based vector insert/extract
...t through the operands from the DAG. There would need to be
> some way to specify that the SDOperand is referencing a subvalue of
> the produced value (perhaps a subclass of SDOperand?). This would
> allow the register allocator to try to use the sub/super register
> sets to perform the instert/extract.
Right. Evan is currently focusing on getting the late stages of the code
generator (e.g. livevars) to be able to understand arbitrary machine
instrs in the face of physreg subregs. This lays the groundwork for
handling vreg subregs, but won't solve it directly.
> Is any of th...
2006 Apr 05
23
how to create RJS visual effects callbacks
I''m trying desperately to get visuall effects callbacks working in rjs
templates to no avail What I''m trying to do is fade an image, change
the div with the image to a new image, and then fade the new image back
in. How would I go about this in RJS Here''s a simple line from my rjs
that I can''t get to work. It is not using callbacks so the
1998 Apr 13
4
New hack against BSD, Linux is _mostly_ safe from it.
My housemate has formalized a sortof new attack against unix-style
operating systems. He''s a BSD fan, so that''s where he developed the
attack. He asked me to check Linux, which I did. It seems Linux is
not vulnerable to it. This attack is going out to BUGTRAQ tonight.
The attack isn''t too serious because it requires physical access to
the console, but it