search for: instcombinesimplifydemand

Displaying 12 results from an estimated 12 matches for "instcombinesimplifydemand".

2011 May 26
0
[LLVMdev] x86 SSE4.2 CRC32 intrinsics renamed
...2.64.[8|64]. > > > > Added: > llvm/trunk/test/CodeGen/X86/sse42_64.ll > Modified: > llvm/trunk/include/llvm/IntrinsicsX86.td > llvm/trunk/lib/Analysis/ValueTracking.cpp > llvm/trunk/lib/Target/X86/X86InstrSSE.td > llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp > llvm/trunk/lib/VMCore/AutoUpgrade.cpp > llvm/trunk/test/CodeGen/X86/sse42.ll > llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll > > Modified: llvm/trunk/include/llvm/IntrinsicsX86.td > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/I...
2017 Jan 29
3
Folding zext from i1 into PHI nodes with only zwo incoming values.
Hi, AFAICT there are two places where zext instructions may get folded into PHI nodes. One is FoldPHIArgZextsIntoPHI and the other is the more generic FoldPHIArgOpIntoPHI. Now, the former only handles PHIs with more than 2 incoming values, while the latter only handles casts where the source type is legal. This means that for an PHI node with two incoming i8 values, both resulting from `zext i1
2017 Jan 24
2
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
...; https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803> > https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409> > > Similar for FP: > https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4780 <https://github.com/llvm-mir...
2017 Jan 30
3
Folding zext from i1 into PHI nodes with only zwo incoming values.
...#39;s no way to > avoid i1 in IR, so we might as well allow transforming to that type? > > I'm not sure yet, but there's a chance that change might induce problems > (infinite loops) with this: > https://github.com/llvm-mirror/llvm/blob/master/lib/Transfor > ms/InstCombine/InstCombineSimplifyDemanded.cpp#L374 > > > On Sun, Jan 29, 2017 at 3:09 PM, Björn Steinbrink via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> Hi, >> >> AFAICT there are two places where zext instructions may get folded into >> PHI nodes. One is FoldPHIArgZextsIntoPHI and...
2017 Jan 23
2
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
...Compares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4780 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1376 On Sun, Jan 22, 2017 at 12:40 PM, Evgeny Astigeevich <Evgeny...
2017 Jan 22
2
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
...Compares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4780 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1376 On Sun, Jan 22, 2017 at 12:40 PM, Evgeny Astigeevich <Evgeny...
2017 Jan 24
3
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
...tps://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803> >> https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409> >> >> Similar for FP: >> https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4780 <https://github....
2017 Jan 22
2
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
Hi Sanjay, The benchmark source file: http://www.llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Shootout/sieve.c?view=markup Clang options used to produce the initial IR: clang -DNDEBUG -O3 -DNDEBUG -mcpu=cortex-a53 -fomit-frame-pointer -O3 -DNDEBUG -w -Werror=date-time -c sieve.c -S -emit-llvm -mllvm -disable-llvm-optzns --target=aarch64-arm-linux Opt options: opt -O3
2017 Jan 30
0
Folding zext from i1 into PHI nodes with only zwo incoming values.
...avoid i1 in IR, so we might as well allow transforming to that type? >> >> I'm not sure yet, but there's a chance that change might induce problems >> (infinite loops) with this: >> https://github.com/llvm-mirror/llvm/blob/master/lib/Transfor >> ms/InstCombine/InstCombineSimplifyDemanded.cpp#L374 >> >> >> On Sun, Jan 29, 2017 at 3:09 PM, Björn Steinbrink via llvm-dev < >> llvm-dev at lists.llvm.org> wrote: >> >>> Hi, >>> >>> AFAICT there are two places where zext instructions may get folded into >>> PHI nodes...
2014 Dec 23
4
[LLVMdev] [RFC] Stripping unusable intrinsics
On Dec 23, 2014, at 10:28 AM, Chris Bieneman <beanz at apple.com> wrote: >>> It should be straight-forward to have something like LLVMInitializeX86Target/RegisterTargetMachine install the intrinsics into a registry. >> >> I tried doing that a few years ago. It’s not nearly as easy as it sounds because we’ve got hardcoded references to various target intrinsics scattered
2017 Jan 24
3
[InstCombine] rL292492 affected LoopVectorizer and caused 17.30%/11.37% perf regressions on Cortex-A53/Cortex-A15 LNT machines
...Compares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4780 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1376 On Sun, Jan 22, 2017 at 12:40 PM, Evgeny Astigeevich <Evgeny...
2015 Jul 29
1
[LLVMdev] Error when i am using command make -j4 command in cygwin to compile safecode
...uild llvm[3]: Compiling InstCombineShifts.cpp for Release+Asserts build llvm[3]: Compiling PartiallyInlineLibCalls.cpp for Release+Asserts build llvm[3]: Compiling WinCodeViewLineTables.cpp for Release+Asserts build llvm[3]: Compiling PlaceSafepoints.cpp for Release+Asserts build llvm[3]: Compiling InstCombineSimplifyDemanded.cpp for Release+Asserts build llvm[3]: Compiling WinException.cpp for Release+Asserts build llvm[4]: Building Release+Asserts Archive Library libLLVMX86AsmParser.a make[4]: Leaving directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/Target/X86/AsmParser' llvm[3]: Compiling Reassociate.cpp for...