search for: instcombinecasts

...; https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338> > https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470> > https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/Inst...

...that, seriously. And I kind of dislike that option too, which is why I am > trying to openly expose my reasons for that. > > As per your question, the following are the ‘undesirable' InstCombine > transforms that I identified: > > int testSimplifySetCC_0( int x ) // 904 > (InstCombineCasts::transformZExtICmp) > { > return (x & 32) != 0; > } > > define i16 @testSimplifySetCC_0(i16 %x) { > entry: > %and = lshr i16 %x, 5 > %and.lobit = and i16 %and, 1 > ret i16 %and.lobit > } > > > int testSExtICmp_0( int x ) // 1274 (InstCombineCasts:...

...gh (this just came up in D28625 too) we might need to remove multiple versions of that in order to unlock optimization: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Tran...

...emdep/memssa the only possible passes that could benefit from > such a canonicalization or you can think of other cases when this can > be useful? > We already canonicalize. We canonicalize in the other direction: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L2024 > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm....

...asses that could benefit from >> such a canonicalization or you can think of other cases when this can >> be useful? >> > > We already canonicalize. We canonicalize in the other direction: > https://github.com/llvm-mirror/llvm/blob/master/ > lib/Transforms/InstCombine/InstCombineCasts.cpp#L2024 > > Intresting. So what is the right solution here? I can easily add handling of gep 0 to GVN, or maybe the code that you mentioned should be in SROA. If SROA is the only user of this transformation and I there are quiet a few passes that it hurts, then I would propose moving this l...

...> that to the consideration of the community again to make sure I am on the > right track. > > My current concrete proposal is to add a command line option (boolean) > that I would name “enable-shift-relaxation” or just “relax-shifts”. This > option would act in several places in InstCombineCasts and in > InstCombineSelect with the described effects. > > I'm not really sold on this part, for the reasons previously discussed. > > This is only going to avoid creating such shifts, in passes that will > be adjusted. > This will not completely ban such shifts, meaning th...

...gh (this just came up in D28625 too) we might need to remove multiple versions of that in order to unlock optimization: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Tran...

...tps://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338> >> https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470> >> https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 <https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/...

Hello All, I am trying to understand the demanded-bits pass. The example in the source code (below) seems quite explicit. In the example, only 16 bits from a 32 bit variable in IR are demanded and therefore the variable is truncated to a 16 bit variable. %1 = add i32 %x, %y %2 = trunc i32 %1 to i16 However I was wondering if for example, the addition demanded, say 18 bits, would this pass

...m >>> such a canonicalization or you can think of other cases when this can >>> be useful? >>> >> >> We already canonicalize. We canonicalize in the other direction: >> https://github.com/llvm-mirror/llvm/blob/master/l >> ib/Transforms/InstCombine/InstCombineCasts.cpp#L2024 >> >> > Intresting. So what is the right solution here? I can easily add handling > of gep 0 to GVN, or maybe the code that you mentioned should be in SROA. > If SROA is the only user of this transformation and I there are quiet a > few passes that it hurts, then I...

The following combine(-enabling transformation) makes me uncomfortable:   gep(addrspacecast(gep p0) to p1)   addrspacecast(gep(gep p0)) to p1 It's applied at visitAddrSpaceCast in InstCombineCasts.cpp. Before this, I'd always assumed address spaces were very much "user domain". Datalayout even supports marking a space as "non-integral", to designate that manipulation as bits is impossible. In my case, I have a different byte width in p1 over p0 (I know - but we all kn...

Hi, In llvm/test/Transforms/InstCombine/cast.ll there is a test like this: target datalayout = "E-p:64:64:64-p1:32:32:32-p2:64:64:64-p3:64:64:64- a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64- v64:64:64-v128:128:128-n8:16:32:64" [...] define <3 x i32> @test60(<4 x i32> %call4) { ; CHECK-LABEL: @test60( ; CHECK-NEXT: [[P10:%.*]] = shufflevector

...he only possible passes that could benefit from > such a canonicalization or you can think of other cases when this can > be useful? > > > We already canonicalize. We canonicalize in the other direction: > https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L2024 > > > Intresting. So what is the right solution here? I can easily add handling > of gep 0 to GVN, or maybe the code that you mentioned should be in SROA. > If SROA is the only user of this transformation and I there are quiet a > few passes that it hurts, then I would p...

Hi Sanjay, The benchmark source file: http://www.llvm.org/viewvc/llvm-project/test-suite/trunk/SingleSource/Benchmarks/Shootout/sieve.c?view=markup Clang options used to produce the initial IR: clang -DNDEBUG -O3 -DNDEBUG -mcpu=cortex-a53 -fomit-frame-pointer -O3 -DNDEBUG -w -Werror=date-time -c sieve.c -S -emit-llvm -mllvm -disable-llvm-optzns --target=aarch64-arm-linux Opt options: opt -O3

----- Original Message ----- > From: "Bjarke Roune" <broune at google.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: llvmdev at cs.uiuc.edu, "Jingyue Wu" <jingyue at google.com> > Sent: Wednesday, July 1, 2015 2:27:59 PM > Subject: Re: [LLVMdev] Deriving undefined behavior from nsw/inbounds/poison for scalar evolution > >

...icmp)))` to expose pairs of `zext(icmp)`. In a subsequent iteration these `zext(icmp)` pairs could then (possibly) be optimized by another optimization (which has already been there before r48715), to replace them by bitwise or integer operations. The code in question is located in `visitZExt()` in InstCombineCasts.cpp: ``` if (ICmpInst *ICI = dyn_cast<ICmpInst>(Src)) return transformZExtICmp(ICI, CI); BinaryOperator *SrcI = dyn_cast<BinaryOperator>(Src); if (SrcI && SrcI->getOpcode() == Instruction::Or) { // zext (or icmp, icmp) --> or (zext icmp), (zext icmp) if at least one...

...gh (this just came up in D28625 too) we might need to remove multiple versions of that in order to unlock optimization: https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCompares.cpp#L4338 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineCasts.cpp#L470 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstructionCombining.cpp#L803 https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L409 Similar for FP: https://github.com/llvm-mirror/llvm/blob/master/lib/Tran...

On Fri, Dec 23, 2016 at 1:01 PM, Piotr Padlewski <piotr.padlewski at gmail.com> wrote: > > > On Dec 23, 2016 19:47, "Daniel Berlin" <dberlin at dberlin.org> wrote: > > Define soon? > My guess is 1 year or less. > (I've already seen patches to start converting most remaining memdep uses, > like memcpy opt, licm, etc) > > > That's good.

My understanding is that this checks whether the bit width of the integer *type* fits in the bit width of the mantissa, not the bit width of the integer value. - CL > On Apr 14, 2016, at 6:02 PM, escha at apple.com wrote: > > We already do this to some extent; see this code in InstCombineCasts: > > // fpto{s/u}i({u/s}itofp(X)) --> X or zext(X) or sext(X) or trunc(X) > // This is safe if the intermediate type has enough bits in its mantissa to > // accurately represent all values of X. For example, this won't work with > // i64 -> float -> i64. > Instructi...

...benefit from >> such a canonicalization or you can think of other cases when this can >> be useful? >> >> >> We already canonicalize. We canonicalize in the other direction: >> https://github.com/llvm-mirror/llvm/blob/master/ >> lib/Transforms/InstCombine/InstCombineCasts.cpp#L2024 >> >> >> Intresting. So what is the right solution here? I can easily add handling >> of gep 0 to GVN, or maybe the code that you mentioned should be in SROA. >> If SROA is the only user of this transformation and I there are quiet a >> few passes that...