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2010 Dec 15
0
[LLVMdev] Optimization passes break machine instructions on new backend
Hello Per,
> The CMPrr instruction is moved down to after the PHI node. My guess is that
> the 'dead' in CFR<imp-def,dead> is to blame, but I can't see what I'm doing
> differently from MSP430/sparc that makes this not work. Any help GREATLY
> appreciated!
It seems like no use of CFR after CMP, indeed. How condbranches on
your platform look like (patterns, etc.)
2010 Dec 15
2
[LLVMdev] Optimization passes break machine instructions on new backend
...384, %reg16385, %CFR<imp-def,dead>;
IntRegs:%reg16388,16384,16385
SKIPCOND 1, *%CFR<imp-use>*
Or doesn't that count?
Following are patters for cmp and skipcond:
def cmpcc : SDNode<"CSISD::CMP", SDTIntBinOp, [SDNPOutFlag]>;
let Defs = [CFR] in {
def CMPrr : InstCS<(outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c),
"cmp $c, $dst",
[(set IntRegs:$dst, (cmpcc IntRegs:$b, IntRegs:$c)),
(implicit CFR)]>;
}
let Uses = [CFR], isBranch = 1, isTerminator = 1 in
def SKIPCOND : InstCS<(outs), (ins CCOp:$cc),...
2010 Dec 15
2
[LLVMdev] Optimization passes break machine instructions on new backend
Hello!
I'm working on a new back-end and have hit a bit of a snag. I'm working on
getting selectcc working and have followed the MSP430 model of emitting a
custom CMP and SELECT_CC node and matching that with a pseudo-instruction
that has useCustomEmitter=1. However, my output ends up very wrong, despite
the Machine code being initially correct:
# Machine code for function func:
Function
2012 Mar 30
1
[LLVMdev] VLIWPacketizerList: failing to schedule terminators
On Thu, Mar 29, 2012 at 03:51:10PM -0700, Andrew Trick wrote:
>
> On Mar 29, 2012, at 1:18 PM, Tom Stellard <thomas.stellard at amd.com> wrote:
>
> > On Thu, Mar 29, 2012 at 02:57:27PM -0500, Sergei Larin wrote:
> >> Tom,
> >>
> >> I do not have your call stack, but packetizer calls
> >> ScheduleDAGInstrs::buildSchedGraph to create