Displaying 20 results from an estimated 21 matches for "inst1".
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2014 Jun 23
3
[LLVMdev] Proposal: Improved regression test support for RuntimeDyld/MCJIT.
...#39;re interested in.
The way to do this is to introduce a simple pointer expression language.
This should be able to express things like: "The immediate for this call
points at symbol foo".
Symbolically, what I have in mind would look something like:
// some asm ...
# assert *(inst1 + 1) = foo
inst1:
callq foo
// some asm...
Here we add the "inst1" label to give us a address from which we can get at
the immediate for the call. The " + 1" expression skips the call opcode (we
know the size of the opcode ahead of time, since this is assembly...
2014 Jun 24
4
[LLVMdev] Proposal: Improved regression test support for RuntimeDyld/MCJIT.
...se a dump+FileCheck. The dump would look something like:
>
> (obviously I don't know, nor for this purpose care, how big the
> instructions are, just that they have distinct addresses, etc)
>
> 0x42: bar:
> 0x42: retq
> 0x43: foo:
> 0x43: callq 0x42
> 0x44: inst1:
> 0x44: retq
>
> And the FileCheck equivalent of
>
> # rtdyld-check: *{4}(inst1 - 4) = (bar - inst1) & 0xffffffff
>
> would be something like:
>
> CHECK: [[CALL_ADDR:.*]]: bar:
> CHECK: callq [[CALL_ADDR]]
>
> Which, I suppose, depends on disassem...
2003 Nov 24
2
[LLVMdev] Question about Instruction comparison
I have been looking over the doxygen documentation as well as the llvm
code. Is there a standard way to check to see if two instructions are
identical (i.e., Inst1 == Inst2 does not work)?
Thanks,
Brian
Brian M. Fahs
Graduate Student
University of Illinois
2012 Jan 03
2
[LLVMdev] AliasAnalysis and memory dependency
Hi all,
I want to find memory dependency between CallInst instruction and other.
So i used the following code:
* AliasAnalysis &AA=getAnalysis<AliasAnalysis>();*
* if(isa<StoreInst>(inst1)){*
* ** **if(isa<CallInst>(inst2))**{*
* CallInst *call_inst2= dyn_cast<CallInst>(inst2); *
* if(AA.getModRefInfo(inst1,call_inst2)==mod)**{*
* //*
* } *
* }*
* }*
but i get the following error. I should what do for exrtact memory...
2003 Nov 24
1
[LLVMdev] Question about Instruction comparison
On Mon, Nov 24, 2003 at 02:13:04PM -0600, Tanya Brethour wrote:
> > I have been looking over the doxygen documentation as well as the
> > llvm code. Is there a standard way to check to see if two
> > instructions are identical (i.e., Inst1 == Inst2 does not work)?
>
> If you want to check if two instructions are the same instruction, you
> should be able to just compare pointers.
Comparing pointers will tell you if they are the SAME instruction. I
think what Brian is looking for is "equivalent" instructions, as I...
2008 Jul 29
1
[LLVMdev] Memory Dependence Analysis: getNonLocalDependency()
...e reverse Control Flow Graph starting at the query instruction's block, is
it correct to say that the last dependent instruction in each visited basic
block is what is mapped ? For example, if a basicblock B has two
instructions:
B:
store i32 1, i32* %i, align 4 (say inst1)
...
load i32* %i, align 4 ; <i32>:39 [#uses=1] (say inst2)
and suppose i had one more Store instruction to %i outside B which is the
query, then when B is visited, in the DenseMap only the mapping <B, inst2>
is added and not <B, inst1> ?
I am guessing that this infor...
2003 Nov 24
0
[LLVMdev] Question about Instruction comparison
> I have been looking over the doxygen documentation as well as the llvm
> code. Is there a standard way to check to see if two instructions are
> identical (i.e., Inst1 == Inst2 does not work)?
If you want to check if two instructions are the same instruction, you
should be able to just compare pointers.
-Tanya
2014 Jun 27
3
[LLVMdev] [RFC] Add compiler scheduling barriers
On 24 June 2014 01:55, Philip Reames <listmail at philipreames.com> wrote:
>
> On 06/19/2014 09:35 AM, Yi Kong wrote:
>>
>> Hi all,
>>
>> I'm currently working on implementing ACLE extensions for ARM. There
>> are some memory barrier intrinsics, i.e.__dsb and __isb that require
>> the compiler not to reorder instructions around their
2012 Jan 03
0
[LLVMdev] AliasAnalysis and memory dependency
Hi neda 8664,
> I want to find memory dependency between CallInst instruction and other. So i
> used the following code:
>
>
>
> / AliasAnalysis &AA=getAnalysis<AliasAnalysis>();/
>
> /*if* (isa< StoreInst >(inst1)){ /
>
> // // /*if* (isa<CallInst>(inst2)) / /{/
>
> / CallInst *call_inst2= dyn_cast<CallInst>(inst2); /
>
> /*if* (AA.getModRefInfo(inst1,call_inst2)==mod) / /{/
>
> / ///
>
> / } /
>
> / }/
>
> / }/
>
>...
2012 Dec 02
1
[LLVMdev] GetElementPtrInst question
...ting Module.
Besides, how can you get a reference to myreg1 ? Looking at your
snippet this variable would be a llvm::Value* (I saw that in the
documentation of IRBuilder). All I have in my code is something like:
llvm::LoadInst *inst2 = new llvm::LoadInst( oneGlobalVariable,
"myreg1", inst1);
Probably I can get a Value pointer to the output register from the
inst2 variable, but I don't know how (I couldn't figure out myself by
just reading the documentation).
Any help is very welcome,
Eduardo
2010 Apr 20
1
converting a zoo or an xts to a data frame
Dear R People:
I have the following code that I use to convert a monthly zoo object
to a data.frame, and it works perfectly:
library(tseries)
z <- get.hist.quote(instrument=inst1, start=start1,end=end1,
quote=quot1,comp = "m")
y <- as.ts(aggregate(z, as.yearmon, tail, 1))
y.df <- data.frame(y=y,time=time(y))
y.df$x <- ts(y.df[,1])
tsp(y.df$x) <- tsp(y.df[,2])
names(y.df) <- c("data","time","ts")
z...
2009 Aug 28
1
How to create a windows vm with ganeti2.
...mmands, with a HVM processor.
I have already initialize too my cluster with HVM and PVM option.
However, i can''t create a windows vm with ganeti2.
my command is: gnt-instance add -t drbd--disk=0:size=5g -B memory=256 -H xen-hvm:cdrom_image_path=/home/Windows_Server_2003.iso -n node1:node2 inst1
It ask me to specifie an os but i only have the debootstrap script.
I have too a mistake that i haven''t the good kernel /usr/lib/xen-unstable/boot/hvmloader but i can''t modify the kernel with xen-hvm.
It is possible to create a windows instance with ganeti2?
How could I have an...
2000 Apr 06
0
Testcase to show the bug in smbclient with tar,ls,mget
...ur
added interface ip=10.44.0.40 bcast=10.44.0.255 nmask=255.255.255.0
Password:
Domain=[IRCN] OS=[Windows NT 4.0] Server=[NT LAN Manager 4.0]
smb: \> cd myinst
smb: \myinst\> archive 0
smb: \myinst\> tarmode quiet
tarmode is now full, system, hidden, noreset, quiet
smb: \myinst\> tar c inst1.tar
tar: dumped 632 files and directories
Total bytes written: 182655488
smb: \myinst\> archive 0
smb: \myinst\> tarmode quiet
tarmode is now full, system, hidden, noreset, quiet
smb: \myinst\> tar c inst2.tar
tar: dumped 632 files and directories
Total bytes written: 182858240
smb: \myins...
2008 Jul 28
0
[LLVMdev] Memory Dependence Analysis: getNonLocalDependency()
On Jul 28, 2008, at 3:47 PM, Prakash Prabhu wrote:
> Hi,
>
> I have a question about the memory dependence analysis. I am trying
> to use it to selectively enumerate a set of pairs of (load, store)
> instructions for every function by calling getNonLocalDependency()
> on the MemoryDependenceAnalysis. This populates a
> DenseMap<BasicBlock*, Value*>. I just
2008 Jul 28
2
[LLVMdev] Memory Dependence Analysis: getNonLocalDependency()
Hi,
I have a question about the memory dependence analysis. I am trying to use
it to selectively enumerate a set of pairs of (load, store) instructions for
every function by calling getNonLocalDependency() on the
MemoryDependenceAnalysis. This populates a DenseMap<BasicBlock*, Value*>. I
just looked up an usage of this in GVN.cpp:
MD->getNonLocalDependency(C, deps);
for
2020 Nov 17
3
[RFC] Control Flow Sensitive AutoFDO (FS-AFDO)
...ng access the bits in their sections only.
For example, there could be 3 rounds of discriminator assigning: the base
discriminator which corresponds to existing discriminator assigning,
discriminator for pass N, and discriminator for pass M. Let’s assume each
round uses 4 bits. If the instruction Inst1 is from BB0 and it’s copied to
BB1, it will have a discriminator 0x1. If BB1:Inst1 is copied to BB2:intr2
before Pass N, this instruction will have a new discriminator of 0x11
associated with pass N. Similarly, each copy of Inst1 before Pass M will
have its own discriminators using bit 8 to bit 12....
2020 Nov 19
0
[RFC] Control Flow Sensitive AutoFDO (FS-AFDO)
...g access the bits in their sections only.
For example, there could be 3 rounds of discriminator assigning: the base discriminator which corresponds to existing discriminator assigning, discriminator for pass N, and discriminator for pass M. Let’s assume each round uses 4 bits. If the instruction Inst1 is from BB0 and it’s copied to BB1, it will have a discriminator 0x1. If BB1:Inst1 is copied to BB2:intr2 before Pass N, this instruction will have a new discriminator of 0x11 associated with pass N. Similarly, each copy of Inst1 before Pass M will have its own discriminators using bit 8 to bit 12....
2012 Dec 02
0
[LLVMdev] GetElementPtrInst question
Hi,
You'd use an IRBuilder, like you did to create your LoadInsts.
IRBuilder<> IRB(BB);
IRB.CreateGEP(myreg1, myreg2);
I assume because you asked this question, something went wrong when using the above method. What was it? :)
Cheers,
James
________________________________________
From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] On Behalf Of Eduardo [erocha.ssa
2010 Aug 10
0
CentOS, Xen and VLANs
...inst/initrd.img"
name = "vm1-inst"
memory = 1000
disk = [ 'phy:/dev/VolGroup01/vm01,xvda,w', ]
vif = ['bridge=virbr0', ]
vcpus = 1
ip = '172.16.1.100'
netmask = '255.255.255.0'
gateway = '172.16.1.1'
extra = "text ks=http://172.16.1.155/vm-inst1-ks.cfg ip=172.16.1.100
netmask=255.255.255.0 gateway=172.16.1.1 dns=172.16.1.200"
To start the install I run:
xm create -c vm1-inst
The CentOS installer finds the kernel and ramdisk files, configures the IP,
then hangs for a while until it states it cannot find the kickstart file.
I have to...
2012 Dec 02
3
[LLVMdev] GetElementPtrInst question
Hi all,
How can I create an llvm::GetElementPtrInst in which the pointer and
the index are in registers previously loaded with llvm::LoadInst ? I
mean, the generated instruction will be like this:
%1 = getelementptr i8* %myreg1, i32 %myreg2
here, %myreg1 and %myreg2 are previously created by load instructions
(llvm::LoadInst).
Please, let me know if there is an example of something similar.