search for: insntruct

...ng to emit the machine > code, are you using the llvm machine code emitter generator stuff >(like PPC)? At the moment, I do not emit real machine code. But I'm planning to do it. If possible, I'll try to use the code emitter stuff of tblgen. But I'm not sure if it can handle the insntruction encodings of my target. This target uses variable length instruction encoding, where 2 bytes are used for opcodes and encodings of memory references and some registers are put between these two bytes. Therefore, the bit offsets are not constant and depend on the type of instruction (e.g. rm, ri...

...de, are you using the llvm machine code emitter generator stuff >> (like PPC)? > > At the moment, I do not emit real machine code. But I'm planning to do > it. If possible, I'll try to use the code emitter stuff of tblgen. But ok. > I'm not sure if it can handle the insntruction encodings of my target. > This target uses variable length instruction encoding, where 2 bytes > are used for opcodes and encodings of memory references and some > registers are put between these two bytes. Therefore, the bit offsets > are not constant and depend on the type of instr...

On Tue, 10 Oct 2006, Roman Levenstein wrote: >>> such a call instruction? >> >> Why not just make the asm string be "call __fsub64"? > > Well, of course it would be the best solution. But the interesting part > is that I need to generate the machine code directly because for > different reasons use of a system assembler is not an option. As a ok. >

Hi, >> My target supports only f64 at the moment. >> Question: How can I tell LLVM that float is the same as double on my >> target? May be by assigning the same register class to both MVT::f32 ?> and MVT::f64? >Just don't assign a register class for the f32 type. This is what the >X86 backend does when it is in "floating point stack mode". This will