Displaying 3 results from an estimated 3 matches for "insbf".
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insb
2014 Sep 25
0
[PATCH] gm107/ir: fix texture argument order
...-stable at lists.freedesktop.org>
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With this, all the tex-miplevel-selection tests pass on maxwell. There is a
minor bit of this change which affects textureGrad on kepler that I have yet
to test, but I'm moderately sure it's correct and was only working by luck
before. (Changing the insbf to use getSrc(s) as its dest instead of
getSrc(0).)
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 32 ++++++++++++++++++----
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 7 +++++
2 files changed, 34 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv...
2014 Jul 05
1
[PATCH 1/2] nvc0/ir: use manual TXD when offsets are involved
Something about how we're implementing offsets for TXD is wrong, just
flip to the generic quadop-based implementation in that case.
This is the minimal fix appropriate for backporting.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: <mesa-stable at lists.freedesktop.org>
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src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 3 ++-
1 file changed, 2
2014 Aug 08
2
[PATCH 1/3] nvc0/ir: add base tex offset for fermi indirect tex case
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
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.../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index f010767..4a9e48f 100644
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