search for: input_chain

Displaying 6 results from an estimated 6 matches for "input_chain".

2008 Nov 04
0
[LLVMdev] Multi-instruction patterns, tablegen and chains
...elieve this is related to a problem David Greene is seeing, where he has a case involving multiple chains. A fully general approach would be to make chain operands explicit in patterns, and to invent some syntax for identifying chain results. It might look something like this: def : Pat<(rd ch:$input_chain, imm:$addr)[$output_chain], (MOVE (RD ch:$input_chain, imm:$addr)[$output_chain])>; This would be a pretty big change though. An alternative that's a bit less ambitious would be to have tablegen search the output pattern for nodes which are declared to support chain operands/res...
2008 Nov 04
2
[LLVMdev] Multi-instruction patterns, tablegen and chains
...oblem David Greene is seeing, > where he has a case involving multiple chains. > A fully general approach would be to make chain operands explicit > in patterns, and to invent some syntax for identifying chain > results. It might look something like this: > > def : Pat<(rd ch:$input_chain, imm:$addr)[$output_chain], > (MOVE (RD ch:$input_chain, imm:$addr)[$output_chain])>; > > This would be a pretty big change though. So you're basically allowing for a way to specify outputs beyond the first output in a dag? That does make sense, and might be useful for o...
2008 Nov 03
3
[LLVMdev] Multi-instruction patterns, tablegen and chains
Hi all, I'm trying some stuff with tblgen and it is doing things I didn't expect. As for some background, I have this RD (read) instruction, which reads a value from an external output. In our architecture, we have two types of registers: buses and registers. The RD instructions puts its result on bus, while the consumer of that data wants to have it in a register. To accomplish this, a
2008 Nov 06
0
[LLVMdev] Multi-instruction patterns, tablegen and chains
...eeing, >> where he has a case involving multiple chains. >> A fully general approach would be to make chain operands explicit >> in patterns, and to invent some syntax for identifying chain >> results. It might look something like this: >> >> def : Pat<(rd ch:$input_chain, imm:$addr)[$output_chain], >> (MOVE (RD ch:$input_chain, imm:$addr)[$output_chain])>; >> >> This would be a pretty big change though. > So you're basically allowing for a way to specify outputs beyond the > first > output in a dag? That does make sense...
2005 May 31
11
More Tests for 2.4.0-RC2 - strange behaviour
...te NEW,INVALID -j dynamic + ''['' -n '''' '']'' + ''['' -n Yes '']'' + ''['' -f /tmp/shorewall.nm8830/iprange '']'' + /sbin/iptables -A eth1_fwd -m state --state NEW,INVALID -j dynamic ++ input_chain eth1 +++ chain_base eth1 +++ local c=eth1 +++ true +++ case $c in +++ echo eth1 +++ return ++ echo eth1_in + createchain eth1_in no ++ chain_base eth1_in ++ local c=eth1_in ++ true ++ case $c in ++ echo eth1_in ++ return + local c=eth1_in + run_iptables -N eth1_in + ''['' -n '...
2005 Feb 01
4
Shorewall problem
I am getting the following message when Shorewall stops can anybody shed any light on this message and where I should be looking? Thanks root@bobshost:~# shorewall stop Loading /usr/share/shorewall/functions... Processing /etc/shorewall/params ... Processing /etc/shorewall/shorewall.conf... Loading Modules... Stopping Shorewall...Processing /etc/shorewall/stop ... IP Forwarding Enabled