Displaying 6 results from an estimated 6 matches for "inmips16mode".
2013 Apr 01
0
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
...00b3449..2ffd3a9 100644
--- a/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
+++ b/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
@@ -35,6 +35,11 @@
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
+bool Mips16DAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
+ if (!Subtarget.inMips16Mode())
+ return false;
+ return MipsDAGToDAGISel::runOnMachineFunction(MF);
+}
/// Select multiply instructions.
std::pair<SDNode*, SDNode*>
Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, DebugLoc DL, EVT Ty,
diff --git a/lib/Target/Mips/Mips16ISelDAGToDAG.h b/lib/Target/Mips/Mips...
2013 Apr 01
3
[LLVMdev] proposed change to class BasicTTI and dual mode mips16/32 working
On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote:
> IMHO the right way to handle target function attributes is to
> re-initialize the target machine and TTI for every function (if the
> attributes changed). Do you have another solution in mind ?
I don't really understand this.
TargetMachine and TTI may be quite expensive to initialize. Doing so for
2012 May 14
3
[LLVMdev] getMinimalPhysRegClass
...ce to you is don't try to swim upstream. The Liskov substitution principle for register classes is deeply ingrained in the LLVM register allocators.
>
> /jakob
>
I guess I can just fix the problem with:
if ((RC == &Mips::CPU16RegsRegClass) &&
!TM.getSubtargetImpl()->inMips16Mode())
RC = &Mips::CPURegsRegClass;
2012 May 14
0
[LLVMdev] getMinimalPhysRegClass
...m upstream. The Liskov substitution principle for register classes is deeply ingrained in the LLVM register allocators.
>>
>> /jakob
>>
> I guess I can just fix the problem with:
>
> if ((RC == &Mips::CPU16RegsRegClass) &&
> !TM.getSubtargetImpl()->inMips16Mode())
> RC = &Mips::CPURegsRegClass;
Can I ask what concrete problem you're seeing? The ARM backend has exactly the same issue: in Thumb1 mode (similar to MIPS16), not all GPRs are available. Accordingly, getMinimalPhysRegClass() returns tGPR (Thumb GPR) for those registers that are...
2012 May 14
0
[LLVMdev] getMinimalPhysRegClass
On May 14, 2012, at 2:28 PM, reed kotler wrote:
> I'm not using getMinimalPhysRegClass. Some target independent code is using it.
Probably PEI.
> It makes trouble for us and I would like to submit a patch to make it a virtual function so that I can override it and make it meaningful for Mips, as long as this method still exists.
>
> I want to add another register class for
2012 May 14
4
[LLVMdev] getMinimalPhysRegClass
On 05/14/2012 02:17 PM, Jakob Stoklund Olesen wrote:
> On May 14, 2012, at 1:02 PM, reed kotler wrote:
>
>> Does anyone understand the purpose of :
>>
>> TargetRegisterInfo::getMinimalPhysRegClass ???
> Barely.
>
>> Why is there the presumption to use the minimal subclass?
> The function can be traced back to a time when men were men and registers belonged to