Displaying 3 results from an estimated 3 matches for "initoperands".
2016 Jan 25
2
Instruction selection gives "LLVM ERROR: Cannot select"
Hello.
I'm writing a back end for a RISC processor (similar to BPF) with a large SIMD unit.
I tried in the last days to make llc compile to SIMD code the following LLVM program:
define i32 @foo(i32* %A, i32* %B, i32* %C, i32 %N) #0 {
entry: ;vector.body: ; preds = %vector.body, %vector.body.preheader.split.split
%0 = getelementptr inbounds i32, i32* %A, i64 0 ; i64 %index ; Alex: I
2016 Feb 04
2
llc gives Segmentation fault at instruction selection [was Re: Instruction selection gives "LLVM ERROR: Cannot select"]
...one
input that is NULL (hence the segfault). More exactly, if we use GDB we see that at the
i-sel of the store we have:
┌──/home/asusu/LLVM/llvm38Nov2016/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
│858 /// Initialize the operands list of this with N operands.│
│859 void InitOperands(SDUse *Ops, const SDValue *Vals, unsigned N) {│
│860 for (unsigned i = 0; i != N; ++i) {│
│861 Ops[i].setUser(this);│
>│862 Ops[i].setInitial(Vals[i]);│
│863 }
Here N = 4 and the Ops are:
{Val = {Node = 0x6e5610, ResNo = 0}, User = 0x6e694...
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
...EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp,
+ MachineMemOperand *MMO, AtomicOrdering Ordering,
+ SynchronizationScope SynchScope)
+ : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
+ InitAtomic(Ordering, Ordering, SynchScope);
InitOperands(Ops, Chain, Ptr, Cmp, Swp);
}
AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL,
@@ -1125,7 +1140,7 @@ public:
SDValue Val, MachineMemOperand *MMO,
AtomicOrdering Ordering, SynchronizationScope SynchScope)
: MemSDNode(Opc, Order, dl, VTL...