search for: inductiverangecheckelimination

Hi, extractRangeChecksFromBranch uses BranchProbabilityInfo to decide whether its worth trying the InductiveRangeCheckElimination transformation. For the following example: void split() { for (int i = 0; i < 100; ++i) { if (i < 99) do_something() else do_something_else() } } But the reported BPI is reported as 50/50 to whether do_something will be called, but we can see with our human eyes that...

Adding Maxim On Apr 9, 2018, at 10:06 AM, Sam Parker via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: Hi, extractRangeChecksFromBranch uses BranchProbabilityInfo to decide whether its worth trying the InductiveRangeCheckElimination transformation. For the following example: void split() { for (int i = 0; i < 100; ++i) { if (i < 99) do_something() else do_something_else() } } But the reported BPI is reported as 50/50 to whether do_something will be called, but we can see with our human eyes that...

Hi, Which optimization passes use profile information? http://llvm.org/docs/Passes.html seems to suggest only block placement uses it, is that correct? Emma. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160715/46cc3ccc/attachment.html>

...gt; unassignedbugs at nondot.org NEW --- [LoopVersioning] lit test hits invalid > domtree assert w/ XDEBUG <https://llvm.org/bugs/show_bug.cgi?id=27487> > 14:31:56 > 27486 <https://llvm.org/bugs/show_bug.cgi?id=27486> librarie Scalar O > unassignedbugs at nondot.org NEW --- [InductiveRangeCheckElimination] > invalidates domtree and hits asserts w/ XDEBUG > <https://llvm.org/bugs/show_bug.cgi?id=27486> 14:29:00 > 27485 <https://llvm.org/bugs/show_bug.cgi?id=27485> librarie Backend: > unassignedbugs at nondot.org NEW --- [X86] Codegen/X86/selectiondag-cse.ll > hits assert wh...

Yeah, they are just triggered by lit check tests. I’ll file some bugs today, though it looks like Quentin may have already filed bugs for some of these. -- Geoff Berry Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From: Daniel Berlin [mailto:dberlin at dberlin.org] Sent: Friday,

...>7 will do not have the "add", > "icmp" and "br" instructions because these BBs can be merged together. > > How can I achieve this? Thanks. > > One - rather heavy weight - way to do this would be to add the -irce pass > after the loop unroll step. InductiveRangeCheckElimination will introduce > a post loop so as to eliminate the range checks in the inner loop. This > might not be the ideal transformation for this code, but it might get you > closer to what you want. > > A couple of caveats: > - 3.5 isn't recent enough to have a stable IRCE. Downloa...

Hi, Florian has been working on loop peeling to remove control flow from loop bodies in https://reviews.llvm.org/D43876. For larger constants or other loop invariant bounds, such like: for (unsigned i = 0; i; i < 1000; ++i) { if (i < M) ... something else ... something else } The loop could be split into two, like so: Min = min(1000, M); unsigned i; for (i = 0; i; i < Min;

Hi, I want to use loop unrolling pass, however, I find that loop unrolling will introduces conditional branch at end of every "unrolled" part. For example, consider the following code *void foo( int n, int array_x[])* *{* * for (int i=0; i < n; i++)* * array_x[i] = i; * *}* Then I use this command "opt-3.5 try.bc -mem2reg -loops -loop-simplify -loop-rotate -lcssa

...>> "icmp" and "br" instructions because these BBs can be merged together. >>> >>> How can I achieve this? Thanks. >>> >>> One - rather heavy weight - way to do this would be to add the -irce >>> pass after the loop unroll step. InductiveRangeCheckElimination will >>> introduce a post loop so as to eliminate the range checks in the inner >>> loop. This might not be the ideal transformation for this code, but it >>> might get you closer to what you want. >>> >>> A couple of caveats: >>> - 3.5 isn'...

Hi, This is Ariel from the Rust team again. I am having another pass ordering issue. Looking at the pass manager at https://github.com/llvm-mirror/llvm/blob/7034870f30320d6fbc74effff539d946018cd00a/lib/Transforms/IPO/PassManagerBuilder.cpp (the early SimplifyCfg now doesn't sink stores anymore! I can't wait until I can get to use that in rustc!) I find that the loop optimization group

For the example code below, int L = M + 10; for (k = 1 ; k <=L; k++) { dummy(); if (k < M) dummy2(); } , we can split the loop into two parts like : for (k = 1 ; k != M; k++) { dummy(); dummy2(); } for (; k <=L; k++) { dummy(); } By splitting the loop, we can remove the conditional block in the loop and indirectly increase vectorization

John Criswell wrote: > If you're interested in SAFECode, the first step is to get SAFECode > working with a newer version of LLVM. A Master's student did some > work on this last summer with LLVM 3.7 but didn't finish. It would > now need to be updated to LLVM 3.8 (though I suppose a completed LLVM > 3.7 port would be fine with me). > > After that, there are

...ause these BBs can be merged >>>>> together. >>>>> >>>>> How can I achieve this? Thanks. >>>>> >>>>> One - rather heavy weight - way to do this would be to add the -irce >>>>> pass after the loop unroll step. InductiveRangeCheckElimination will >>>>> introduce a post loop so as to eliminate the range checks in the inner >>>>> loop. This might not be the ideal transformation for this code, but it >>>>> might get you closer to what you want. >>>>> >>>>> A coupl...

.../NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/SelectionDAG' make[3]: Entering directory '/home/NIKHILREDDY/WORK/LLVM_OBJ/lib/CodeGen/AsmPrinter' llvm[2]: Compiling TargetTransformInfo.cpp for Release+Asserts build llvm[3]: Compiling ARMException.cpp for Release+Asserts build llvm[3]: Compiling InductiveRangeCheckElimination.cpp for Release+Asserts build llvm[2]: Compiling Trace.cpp for Release+Asserts build llvm[3]: Compiling AddressPool.cpp for Release+Asserts build llvm[2]: Compiling TypeBasedAliasAnalysis.cpp for Release+Asserts build llvm[3]: Compiling AsmPrinter.cpp for Release+Asserts build llvm[3]: Compiling Ju...