Displaying 6 results from an estimated 6 matches for "indirectaddress".
2015 Feb 26
5
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
Hi all,
I've started looking at the GlobalMerge pass, enabled by default on
ARM and AArch64. I think we should reconsider that, at least for
AArch64.
As is, the pass just merges all globals together, in groups of 4KB
(AArch64, 128B on ARM).
At the time it was enabled, the general thinking was "it's almost
free, it doesn't affect performance much, we might as well use it".
2015 May 15
6
[LLVMdev] Proposal: change LNT’s regression detection algorithm and how it is used to reduce false positives
tl;dr in low data situations we don’t look at past information, and that increases the false positive regression rate. We should look at the possibly incorrect recent past runs to fix that.
Motivation: LNT’s current regression detection system has false positive rate that is too high to make it useful. With test suites as large as the llvm “test-suite” a single report will show hundreds of
2015 May 18
2
[LLVMdev] Proposal: change LNT’s regression detection algorithm and how it is used to reduce false positives
...- 66.13s this program) nts.MultiSource/Applications/hexxagon/hexxagon.exec
> 11. 35.04% cumulative (1.14% - 65.98s this program) nts.SingleSource/Benchmarks/Polybench/linear-algebra/kernels/syr2k/syr2k.exec
> 12. 36.14% cumulative (1.10% - 63.21s this program) nts.MultiSource/Benchmarks/TSVC/IndirectAddressing-dbl/IndirectAddressing-dbl.exec
> 13. 37.22% cumulative (1.08% - 62.35s this program) nts.SingleSource/Benchmarks/SmallPT/smallpt.exec
> 14. 38.30% cumulative (1.08% - 62.30s this program) nts.MultiSource/Benchmarks/nbench/nbench.exec
> 15. 39.37% cumulative (1.07% - 61.98s this program...
2018 Apr 26
0
Compare test-suite benchmarks performance complied without TBAA, with default TBAA and with new TBAA struct path
...73678|2.030239169| -1.34|12945473685| 0|2.005207587| -0.11|12945473680| 0|
|MultiSource/Benchmarks/TSVC/GlobalDataFlow-flt/GlobalDataFlow-flt.test | 43|0.824523437| 5574340604|0.819459866| 0.62| 5574340602| 0|0.808334658| 2| 5574340599| 0|
|MultiSource/Benchmarks/TSVC/IndirectAddressing-dbl/IndirectAddressing-dbl.test| 40| 2.13915252|16924618858|2.139128559| 0|16924618893| 0|2.139481883| -0.02|16924618893| 0|
|MultiSource/Benchmarks/TSVC/IndirectAddressing-flt/IndirectAddressing-flt.test| 40|1.797690481|16924004255|1.798647228| -0.05|16924004256| 0|1.79740...
2013 Jul 28
0
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
...914 0.11968021446694
Benchmarks/TSVC/Packing-dbl/Packing-dbl 2.8154 2.8196 0.14917951268025
Benchmarks/BitBench/five11/five11 4.038 4.0448 0.16840019811788
Benchmarks/Olden/treeadd/treeadd 0.1588 0.1591 0.18891687657430
Benchmarks/TSVC/IndirectAddressing-flt/Indi 2.1573 2.1615 0.19468780419969
Benchmarks/Ptrdist/anagram/anagram 0.6629 0.6644 0.22627847337455
Benchmarks/TSVC/StatementReordering-flt/Sta 1.8867 1.892 0.28091376477446
Benchmarks/TSVC/IndirectAddressing-dbl/Indi 2.6113 2.6189 0.29...
2013 Jul 18
3
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
Andy and I briefly discussed this the other day, we have not yet got
chance to list a detailed pass order
for the pre- and post- IPO scalar optimizations.
This is wish-list in our mind:
pre-IPO: based on the ordering he propose, get rid of the inlining (or
just inline tiny func), get rid of
all loop xforms...
post-IPO: get rid of inlining, or maybe we still need it, only