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indexmed
2015 Jul 10
0
[LLVMdev] TSFlags
On 7/10/2015 10:23 AM, Sky Flyer wrote:
> Many thanks for your prompt reply.
>
> I mean, imagine you have 3 bits for condition flags in your instruction
> (e.g. overflow, zero, carry set, ...) for conditional executions AND
> there is no direct access to the Status Register, is it even possible to
> implement such scenario?
>
There doesn't have to be any explicit status
2015 Jul 10
3
[LLVMdev] TSFlags
Many thanks for your prompt reply.
I mean, imagine you have 3 bits for condition flags in your instruction
(e.g. overflow, zero, carry set, ...) for conditional executions AND there
is no direct access to the Status Register, is it even possible to
implement such scenario?
On Fri, Jul 10, 2015 at 4:54 PM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:
> On 7/10/2015 9:32