search for: indenpend

Displaying 12 results from an estimated 12 matches for "indenpend".

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2002 Apr 18
2
Data.Frame Multiplication
Have got any R-proffessional a starting point for me how i can write me a function which multiply every column with every other column in the data.frame - indenpendent from the dim's . Thanks in advance regards,Christian -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.- r-help mailing list -- Read http://www.ci.tuwien.ac.at/~hornik/R/R-FAQ.html Send "info", "help", or "[un]subscribe" (in the &...
2011 Jun 12
1
partial correlation
how can I compute partial correlation there's four variables; income, age, educational level, race. income is indenpendent variable and race is nominal variable I want to calculate partial correlation or semi-partial correlation between income & race help me out... thanks. -- View this message in context: http://r.789695.n4.nabble.com/partial-correlation-tp3591520p3591520.html Sent from the R help mailing li...
2008 Nov 26
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
...end. Am I right? or I miss something. > there is currently no support for anything like f32 -> f24 You say "there is currently no support for anything like f32 -> f24", does it means I can not write codes like below? addRegisterClass(MVT::i24, XXXRegisterClass); If the target-indenpendent codegen supports i24, then I can writes codes like above, then does it means LLVM backend codegen can handle any i32->i24 and f32->f24 for me automatically? So that I don't need to worry about i32->i24 and f32->f24? > On the other hand, as I mentioned in another email, I thin...
2008 Nov 26
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
On Wednesday 26 November 2008 09:31:26 Wei wrote: > O...k... I try to make some conclusions: > > 1) The conversion from f32 to f24 or i32 to i24 should be written in > the backend. I disagree. This should be handled by the type legalization infrastructure. After all, that's what it is for! However there is currently no support for anything like f32 -> f24. On the other
2008 Nov 26
1
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
...t; >> there is currently no support for anything like f32 -> f24 > > You say "there is currently no support for anything like f32 -> f24", > does it means I can not write codes like below? > > addRegisterClass(MVT::i24, XXXRegisterClass); > > If the target-indenpendent codegen supports i24, then I can writes > codes like above, then does it means LLVM backend codegen can handle > any i32->i24 and f32->f24 for me automatically? So that I don't need > to worry about i32->i24 and f32->f24? > >> On the other hand, as I mentioned i...
2008 Jan 19
1
(sem assunto)
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2012 Nov 09
1
[LXC][Openstack] Clarifications needed on usage of libvirt-lxc for openstack
Hi everyone, I've some doubts regarding the usage/working of libvirt-lxc with openstack. I'm doing a project titled "Low density virtualization for Storage cloud" 1. Can i use libvirt for lxc with Openstack swift alone (excluding nova, glance and keystone)? If no what other openstack components should i use for virtualization? (Is it necessary to install openstack nova to do
2008 Aug 05
1
[LLVMdev] Contributing to LLVM
On Tuesday 05 August 2008 03:27, Bill Wendling wrote: > On Aug 4, 2008, at 10:29 PM, Shrutarshi Basu wrote: > > Hello all, > > I'm a rising sophomore CS/Engineering student in the US and I'm > > interested in programming languages/ compilers.I think the LLVM would Yay! We need more compiler people in this industry. :) This is actually a very good time to be getting
2008 Nov 22
2
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Do you mean MVT::getIntegerVT? Because I can not find getExtendedIntegerVT in the llvm source codes. I am excited seeing this function, however I have the following more questions. 1) You mention I will have to change not small amount of target indenpendent codegen codes to support this extended type. Are there any document to describe how to do such kind modification? I see there is a "extending LLVM" document in the official website, and I don't know whether the info written in its "Adding a new SelectionDAG node" section...
2008 Nov 24
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
...il call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @str, i32 0, i32 0), i32 %t2 ) nounwind ret void } declare i32 @printf(i8*, ...) nounwind You can run llc on it to see how codegen deals with i24. > > > 1) You mention I will have to change not small amount of target > indenpendent codegen codes to support this extended type. > Are there any document to describe how to do such kind modification? > I see there is a "extending LLVM" document in the official website, > and I don't know whether the info written in its "Adding a new > SelectionDAG...
2008 Nov 21
0
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
24 bit is not unusual in the DSP world. I suppose int == 24 bit integer for some of these chips? There isn't a i24 simple type. However, you can create an extended integer type. See getExtendedIntegerVT. It's almost guaranteed you will have to change a chunk of target independent codegen to support the use of an extended type though. Evan On Nov 20, 2008, at 4:46 AM, Wei wrote:
2008 Nov 20
4
[LLVMdev] Does current LLVM target-independent code generator supports my strange chip?
Because each channel contains 24-bit, so.. what is the llvm::SimpleValueType I should use for each channel? the current llvm::SimpleValueType contains i1, i8, i16, i32, i64, f32, f64, f80, none of them are fit one channel (24-bit). I think I can use i32 or f32 to represent each 24-bit channel, if the runtime result of some machine instructions exceeds 23-bit (1 bit is for sign), then it is an