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...think ipsecnat won''t work at all with gw zone defined? I''m not sure about that because I didn''t have time to test. --- firewall~ 2002-12-28 11:27:57.000000000 +0200 +++ firewall 2003-01-07 00:58:08.000000000 +0200 @@ -1344,6 +1344,7 @@ run_iptables -A $inchain -p udp -s $1 --sport 500 --dport 500 $options else run_iptables -A $inchain -p udp -s $1 --dport 500 $options + run_iptables -A $inchain -p udp -s $1 --dport 4500 $options fi for z in `separate_list $3`; do -- Tuomo Soini <tis@foobar.fi&gt...

Hello, David > Ah, isLegalToFold saves us on trunk.  But we lose folding due to prefetching, > which is unfortunate. > > I am seeing the error with 2.5 (yes, we are upgrading!). > > I guess I'll have to backport some of the isLogalToFold logic. There was x86-only code at pre-2.6 times which was later moved into generic hook named "isLegalAndProfitableToFold". You

...32.noret to the correct instruction with the following code sequence. LowerINTRINSIC_W_CHAIN(...) { ... case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret: IntNo = AMDILISD::ATOM_G_ADD_NORET; break; ... SDValue Ops[6]; SDValue chain = Op.getOperand(0); unsigned numNodes = 0; if (inChain) { Ops[numNodes++] = chain; } SDValue Chain = Op.getOperand(0); Ops[numNodes++] = Op.getOperand((inChain) ? 2 : 1); Ops[numNodes++] = DAG.getConstant(1, MVT::i32); Ops[numNodes++] = DAG.getTargetConstant(0, MVT::i32); Op = DAG.getNode(IntNo, dl, EVT::EVT(MVT::i32), Ops, numNodes);...

On Monday 22 February 2010 13:26:54 David Greene wrote: > On Monday 22 February 2010 13:06:39 Chris Lattner wrote: > > > Just wanted to clarify in case someone was wondering about this. > > > > I'm currently working in this area. What pattern is causing the cycle? > > Can I get a testcase? > > I'll see if I can generate one and file a PR. Ah,

...wing code sequence. > > LowerINTRINSIC_W_CHAIN(…) > { > … > case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret: > IntNo = AMDILISD::ATOM_G_ADD_NORET; break; > … > SDValue Ops[6]; > SDValue chain = Op.getOperand(0); > unsigned numNodes = 0; > if (inChain) { > Ops[numNodes++] = chain; > } > SDValue Chain = Op.getOperand(0); > Ops[numNodes++] = Op.getOperand((inChain) ? 2 : 1); > Ops[numNodes++] = DAG.getConstant(1, MVT::i32); > Ops[numNodes++] = DAG.getTargetConstant(0, MVT::i32); > Op = DAG.getNode(IntNo, dl, EV...

...AIN(...) > > { > > ... > > case AMDILIntrinsic::AMDIL_atomic_add_gu32_noret: > > IntNo = AMDILISD::ATOM_G_ADD_NORET; break; > > ... > > SDValue Ops[6]; > > SDValue chain = Op.getOperand(0); > > unsigned numNodes = 0; > > if (inChain) { > > Ops[numNodes++] = chain; > > } > > SDValue Chain = Op.getOperand(0); > > Ops[numNodes++] = Op.getOperand((inChain) ? 2 : 1); > > Ops[numNodes++] = DAG.getConstant(1, MVT::i32); > > Ops[numNodes++] = DAG.getTargetConstant(0, MVT::i32); > &g...

...G handling to PPCTargetLowering::ReplaceNodeResults() where I need to read/increse/write a number in memory while providing nothing in &Results. The problem is that the Chain of the va_arg node needs to be updated but I dont know how to do that. I tried stuff like: SDValue Ops[] = { InChain, VAListPtr, N->getOperand(2), N->getOperand(3) }; SDValue NewNode = DAG.getNode(ISD::VAARG, dl, DAG.getVTList(VT, MVT::Other), Ops, 4); DAG.ReplaceAllUsesWith(N, NewNode.getNode()); // or this variant //DAG.ReplaceAllUsesWith(SDValue(N, 1), NewNode); but that does no...

..., Custom); > > // VASTART needs to be custom lowered to use the VarArgsFrameIndex > setOperationAction(ISD::VASTART , MVT::Other, Custom); > @@ -1369,8 +1371,13 @@ SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG, > return DAG.getLoad(VT, dl, InChain, Result, MachinePointerInfo(), false, false, 0); > } > > -SDValue PPCTargetLowering::LowerTRAMPOLINE(SDValue Op, > - SelectionDAG &DAG) const { > +SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op, > +...

Hi! Attached set of patches splits llvm.init.trampoline into an "init" phase and an "adjust" phase, as discussed on the "Go on dragonegg" thread. Thanks! -- Sanjoy Das http://playingwithpointers.com -------------- next part -------------- A non-text attachment was scrubbed... Name: 0001-Split-intrinsics-and-DAG-nodes.patch Type: text/x-diff Size: 8808 bytes Desc:

...itAtomicCmpXchg(const AtomicCmpXchgInst &I) { SDLoc dl = getCurSDLoc(); - AtomicOrdering Order = I.getOrdering(); + AtomicOrdering SuccessOrder = I.getSuccessOrdering(); + AtomicOrdering FailureOrder = I.getFailureOrdering(); SynchronizationScope Scope = I.getSynchScope(); SDValue InChain = getRoot(); const TargetLowering *TLI = TM.getTargetLowering(); if (TLI->getInsertFencesForAtomic()) - InChain = InsertFenceForAtomic(InChain, Order, Scope, true, dl, + InChain = InsertFenceForAtomic(InChain, SuccessOrder, Scope, true, dl, DAG,...