Displaying 5 results from an estimated 5 matches for "immbranch".
2013 Nov 18
3
[LLVMdev] possible thumb bug in constant islands
...onal branch whose
destination is
/// too far away to fit in its displacement field. If the LR register
has been
/// spilled in the epilogue, then we can use BL to implement a far jump.
/// Otherwise, add an intermediate branch instruction to a branch.
bool
ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) {
MachineInstr *MI = Br.MI;
MachineBasicBlock *MBB = MI->getParent();
if (!isThumb1)
llvm_unreachable("fixupUnconditionalBr is Thumb1 only!");
// Use BL to implement far jump.
Br.MaxDisp = (1 << 21) * 2;
MI->setDesc(TII->get(ARM::tBfar));...
2013 Nov 19
0
[LLVMdev] possible thumb bug in constant islands
...nation is
> /// too far away to fit in its displacement field. If the LR register has been
> /// spilled in the epilogue, then we can use BL to implement a far jump.
> /// Otherwise, add an intermediate branch instruction to a branch.
> bool
> ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) {
> MachineInstr *MI = Br.MI;
> MachineBasicBlock *MBB = MI->getParent();
> if (!isThumb1)
> llvm_unreachable("fixupUnconditionalBr is Thumb1 only!");
>
> // Use BL to implement far jump.
> Br.MaxDisp = (1 << 21) * 2;
> MI->setDesc(TI...
2013 Nov 19
1
[LLVMdev] possible thumb bug in constant islands
...// too far away to fit in its displacement field. If the LR register has been
>> /// spilled in the epilogue, then we can use BL to implement a far jump.
>> /// Otherwise, add an intermediate branch instruction to a branch.
>> bool
>> ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) {
>> MachineInstr *MI = Br.MI;
>> MachineBasicBlock *MBB = MI->getParent();
>> if (!isThumb1)
>> llvm_unreachable("fixupUnconditionalBr is Thumb1 only!");
>>
>> // Use BL to implement far jump.
>> Br.MaxDisp = (1 <<...
2008 Apr 16
0
[LLVMdev] Being able to know the jitted code-size before emitting
...ck());
> BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
> - BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
> + BBSizes[MBB->getNumber()] += TII->GetInstSize(&MBB->back());
> unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
> ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false,
> Br.UncondBr));
>
> // Remove the old conditional branch. It may or may not still be
> in MBB.
> - BBSizes[MI->getParent()->getNumber()] -= ARM::GetInstSize(MI);
> + BBSizes[MI->getParent()->getNumber...
2008 Apr 15
4
[LLVMdev] Being able to know the jitted code-size before emitting
OK, here's a new patch that adds the infrastructure and the
implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize.
Both functions are virtual functions defined in TargetInstrInfo.h.
For X86, I moved some commodity functions from X86CodeEmitter to
X86InstrInfo.
What do you think?
Nicolas
Evan Cheng wrote:
>
> I think both of these belong to TargetInstrInfo. And