Displaying 3 results from an estimated 3 matches for "imm0_65535_expr".
2012 Sep 12
2
[LLVMdev] [PATCH][Review request] tablegen: extend list fields
...g a '"+" in front of a superclass:
- Example 1:
def D0 : C1 {
let Predicates += [P2]; // Append P2 to C1's Predicates
}
- Example 2:
def D0 : C1, +AddP1;
Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as
def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm),
DPFrm, IIC_iMOVi,
"movw", "\t$Rd, $imm",
[(set GPR:$Rd, imm0_65535:$imm)]>,
Requires<[IsARM, HasV6T2]>, UnaryDP {
can be rewritten to this:
class PredHasV6T2 {
list<Predicate> Predicat...
2012 Sep 12
0
[LLVMdev] [llvm-commits] [PATCH][Review request] tablegen: extend list fields
...1:
>
> def D0 : C1 {
> let Predicates += [P2]; // Append P2 to C1's Predicates
> }
>
> - Example 2:
>
> def D0 : C1, +AddP1;
>
>
> Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as
>
> def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm),
> DPFrm, IIC_iMOVi,
> "movw", "\t$Rd, $imm",
> [(set GPR:$Rd, imm0_65535:$imm)]>,
> Requires<[IsARM, HasV6T2]>, UnaryDP {
>
>
> can be rewritten to this:
>
> class Pred...
2012 Sep 14
1
[LLVMdev] [llvm-commits] [PATCH][Review request] tablegen: extend list fields
...+= [P2]; // Append P2 to C1's Predicates
> > }
> >
> > - Example 2:
> >
> > def D0 : C1, +AddP1;
> >
> >
> > Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as
> >
> > def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm),
> > DPFrm, IIC_iMOVi,
> > "movw", "\t$Rd, $imm",
> > [(set GPR:$Rd, imm0_65535:$imm)]>,
> > Requires<[IsARM, HasV6T2]>, UnaryDP {
> >
> >
> > can be rewr...