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...ue, 9 Jan 2007, Evan Cheng wrote: >> - How does one deal with multiple instruction sequences in a pattern? >> To load a constant is a two instruction sequence, but both >> instructions only take two operands (assume that r3 is a 32-bit >> register): >> >> ilhu $3, 45 # r3 = (45 << 16) >> iohl $3, 5 # r3 |= 5 >> >> I tried: >> >> def : Pat<(i32 imm:$imm), >> (IOHL (ILHU (HI16 imm:$imm)), (LO16 imm:$imm))>; > > It is possible to write multi-instruction pattern,...

...DNodeXform that returns upper >>and lower 16 bits respectively. Take a look at PSxLDQ_imm in >>X86InstrSSE.td as an example. > > > Another good example is the PPC backend, which has the exact same issue > for integer constants. Actually, for SPU, not quite the same: def ILHU : RI16Form<0b010000010, (ops GPRC:$rT, u16imm:$val), "ilhu $rT, $val", LoadNOP, [(set GPRC:$rT, immZExt16:$val)]>; def IOHL : RI16Form<0b100000110, (ops GPRC:$rT, u16imm:$val), "iohl $rT, $val", LoadNOP,...

...16 bits respectively. Take a look at PSxLDQ_imm in >>> X86InstrSSE.td as an example. >> >> >> Another good example is the PPC backend, which has the exact same >> issue >> for integer constants. > > Actually, for SPU, not quite the same: > > def ILHU : RI16Form<0b010000010, (ops GPRC:$rT, u16imm:$val), > "ilhu $rT, $val", LoadNOP, > [(set GPRC:$rT, immZExt16:$val)]>; > > def IOHL : RI16Form<0b100000110, (ops GPRC:$rT, u16imm:$val), > "iohl $rT, $v...

...hauling in the raft of intrinsics that the Cell SDK defines. Three quick questions: - How does one deal with multiple instruction sequences in a pattern? To load a constant is a two instruction sequence, but both instructions only take two operands (assume that r3 is a 32-bit register): ilhu $3, 45 # r3 = (45 << 16) iohl $3, 5 # r3 |= 5 I tried: def : Pat<(i32 imm:$imm), (IOHL (ILHU (HI16 imm:$imm)), (LO16 imm:$imm))>; - The return instruction for Cell SPU is "bi $lr". How do I jam that into the instruction info w/o...

...e Cell SDK defines. > > Three quick questions: > > - How does one deal with multiple instruction sequences in a pattern? > To load a constant is a two instruction sequence, but both > instructions only take two operands (assume that r3 is a 32-bit > register): > > ilhu $3, 45 # r3 = (45 << 16) > iohl $3, 5 # r3 |= 5 > > I tried: > > def : Pat<(i32 imm:$imm), > (IOHL (ILHU (HI16 imm:$imm)), (LO16 imm:$imm))>; It is possible to write multi-instruction pattern, e.g. X86InstrSSE.td line 1911....