search for: iir_mem2

...ility-inlines-hidden" is valid for C++/ObjC++ but not for C In file included from filters.c:45: filters_sse.h:135: error: conflicting types for 'filter_mem2' filters.h:62: error: previous declaration of 'filter_mem2' was here filters_sse.h:234: error: conflicting types for 'iir_mem2' filters.h:64: error: previous declaration of 'iir_mem2' was here filters_sse.h:331: error: conflicting types for 'fir_mem2' filters.h:63: error: previous declaration of 'fir_mem2' was here filters.c: In function 'syn_percep_zero': filters.c:350: warning: passing...

...; is > valid for C++/ObjC++ but not for C > In file included from filters.c:45: > filters_sse.h:135: error: conflicting types for 'filter_mem2' > filters.h:62: error: previous declaration of 'filter_mem2' was here > filters_sse.h:234: error: conflicting types for 'iir_mem2' > filters.h:64: error: previous declaration of 'iir_mem2' was here > filters_sse.h:331: error: conflicting types for 'fir_mem2' > filters.h:63: error: previous declaration of 'fir_mem2' was here > filters.c: In function 'syn_percep_zero': > filter...

...s two file.including below functions void open_loop_nbest_pitch(float *sw, int start, int end, int len, int *pitch, float *gain, int N, char *stack); float pitch_gain_search_3tap( int forced_pitch_quant( void filter_mem2(float *x, float *num, float *den, float *y, int N, int ord, float *mem) void iir_mem2(float *x, float *den, float *y, int N, int ord, float *mem) void fir_mem2(float *x, float *num, float *y, int N, int ord, float *mem) void syn_percep_zero(float *xx, float *ak, float *awk1, float *awk2, float *y, int N, int ord, char *stack) void residue_percep_zero(float *xx, float *ak, float *awk...

...annel. I did a little work on inner_prod() and normalize16() and I'm confident I can get 32 channels by optimizing 5 or 6 functions. I expect these numbers to translate over the DM642. Symbol Name Count cycle.Total: Incl. cycle.Total:Excl. compute_weighted_codebook 200 4511420 4511420 iir_mem2 599 3338308 3338308 filter_mem2 799 2323655 2323655 compute_impulse_response 200 1800518 1800518 pitch_gain_search_3tap 199 4726604 1744952 open_loop_nbest_pitch 199 4204121 1641016 vq_nbest 800 1626252 1626252 lpc_to_lsp 50 1612650 1558133 nb_encode 50 27412845 117955...

Hello! I'v downloaded speex lib 1.1.11.1. I am trying to port speex lib to Blackfin processor. I am using VisualDSP++ 4.0. If I am compiling source codes with using floating point everything ok. When I am compiling with FIXED_POINT defined everything's ok and code works about two times faster. But when I am defining BFIN_ASM I am getting several compiling errors in Blackfin assembler

...ctly what assembly statement is causing the crash and what the operands are? Jean-Marc > So, has anyone else seen this issue? > > I am working off svn- the crash is always in the same spot, > in the decoder, in nb_celp, in both filter_mem2 > (if st->lpc_enh_enabled == 1) and iir_mem2 (if == 0) > > The function in question is filter_mem2_10 or > iir_mem2_10 > > _mm_loadu_ps is an unaligned load and all of the > data seems to be ok, and no sigill- get a sigsegv. > > Same code works fine on windoze. CPU in question > is a 2.8 ghz hyperthread- xmm/SSE...

...target only if it's worth it */ These functions represent 1/2 of the compute time at complexity 10 and 4/5 at complexity 4. The next hot functions at low complexity are: qmf_decomp, fir_mem_up and pitch_gain_search_3tap Some questions I have: 1. I haven't been able to get the version of iir_mem2 in filters_sse.h translated and working. Does this work with GCC, I'm burning my eyeballs trying to spot the difference in my version. 2. I don't have a good source of wav data for testing. I've noticed that introducing bugs into speex (even gross ones like returning completely incorrec...

>What frequency is the ARM processor? The phone shows ARM720 no freq. I'm going to have to guess around 100 Mhz. I ran the same code on an XSCALE ARM 400 mhz. Toshiba e740. Runs about .33 -> .4x realtime. This is the using the generic fixed point defines. Around 5 times faster than I am seeing with the Orange SPV e100. I am using the 1.1.3 codebase. Thanks for taking the time to

Hello Jean-Marc >If you want to do it, I can show you >what functions (there are 2-3) to port. Otherwise I might do it >eventually, but it's not a top priority (there's already an SSE version >though). I would indeed like to know which functions can be used to improve K6-2 performance through 3DNow. Cheers Bjoern D. Rasmussen <p><p><p>>From: Jean-Marc

...branch though because it's still experimental and very unclean in some parts (alignment, forced order 10 even when we need 8). In the mean time, I'm attaching my modified version of filter_mem2. The modifs I made removed the need for unaligned moves and could also be applied to fir_mem2 and iir_mem2. > One major thing to note - In Altivec everything needs to be 16 byte aligned > for it to work efficiently. A number of the starting points right now are > only 4 byte aligned. If you can add the following macro to the variables > that get passed in, it will make everything easier....

Le jeu 15/01/2004 à 15:30, Daniel Vogel a écrit : > Unrelated, but please use SSE/MMX/... intrinsics on Windows instead of using > inline assembly so you also get the speed benefit on Win64. OK, so here's a first start. I've translated to intrinsics the asm I sent 1-2 days ago. The result is about 5% slower than the pure asm approach, so it's not too bad (SSE asm is 2x faster

...gt;submodeID] == NULL) { for (i=0;i<st->frameSize;i++) st->exc[i]=st->sw[i]=VERY_SMALL; for (i=0;i<st->lpcSize;i++) st->mem_sw[i]=0; st->first=1; st->bounded_pitch = 1; /* Final signal synthesis from excitation */ iir_mem2(st->exc, st->interp_qlpc, st->frame, st->frameSize, st->lpcSize, st->mem_sp); #ifdef RESYNTH for (i=0;i<st->frameSize;i++) in[i]=st->frame[i]; #endif return 0; } /* LSP Quantization */ if (st->first) { for (i=0;i<st->lpc...

...: : "r" (mem), "r" (x+i), "r" (y+i), "r" (num), "r" (den) + : "memory" ); +#endif + } + for (i=0;i<ord;i++) + _mem[i]=mem[i]; + } } <p>-void iir_mem2(float *x, float *den, float *y, int N, int ord, float *mem) +void iir_mem2(float *x, float *_den, float *y, int N, int ord, float *_mem) { - int i,j; - for (i=0;i<N;i++) - { - y[i] = x[i] + mem[0]; - for (j=0;j<ord-1;j++) - { - mem[j] = mem[j+1] - den[j+1]*y[i];...

Jean-Marc, There is a big difference between SSE and SSEFP. The SSEFP means that the CPU supports the xmm registers. All Intel chips with SSE support do, however no current 32 bit AMD chips support the XMM registers. They will support the SSE instructions but not those registers. You are right about the SSE2 not being used. The AMD Opterons are the first AMD CPU's which support