search for: iimyinstr

Displaying 3 results from an estimated 3 matches for "iimyinstr".

2013 May 09
2
[LLVMdev] Scheduling with RAW hazards
I have an instruction that takes no operands, and produces two results, in two consecutive cycles. I tried both of the following to my Schedule.td file: InstrItinData<IIMyInstr, [InstrStage<2, [FuncU]>], [1, 2]>, InstrItinData<IIMyInstr, [InstrStage<1, [FuncU]>, InstrStage<1, [FuncU]>], [1, 2]>, From what I can see in examples, these say that the first operand is ready the cycle after issue, and the second is ready 2 cycles after issue....
2013 May 09
0
[LLVMdev] Scheduling with RAW hazards
On May 9, 2013, at 4:02 AM, Fraser Cormack <fraser at codeplay.com> wrote: > I have an instruction that takes no operands, and produces two results, in two consecutive cycles. > > I tried both of the following to my Schedule.td file: > > InstrItinData<IIMyInstr, [InstrStage<2, [FuncU]>], [1, 2]>, > InstrItinData<IIMyInstr, [InstrStage<1, [FuncU]>, InstrStage<1, [FuncU]>], [1, 2]>, > > From what I can see in examples, these say that the first operand is ready the cycle after issue, and the second is ready 2 cycles a...
2013 May 13
1
[LLVMdev] Scheduling with RAW hazards
...t codeplay.com > <mailto:fraser at codeplay.com>> wrote: > >> I have an instruction that takes no operands, and produces two >> results, in two consecutive cycles. >> >> I tried both of the following to my Schedule.td file: >> >> InstrItinData<IIMyInstr, [InstrStage<2, [FuncU]>], [1, 2]>, >> InstrItinData<IIMyInstr, [InstrStage<1, [FuncU]>, InstrStage<1, >> [FuncU]>], [1, 2]>, >> >> From what I can see in examples, these say that the first operand is >> ready the cycle after issue, and...