search for: iic_imovi

...: - Example 1: def D0 : C1 { let Predicates += [P2]; // Append P2 to C1's Predicates } - Example 2: def D0 : C1, +AddP1; Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm), DPFrm, IIC_iMOVi, "movw", "\t$Rd, $imm", [(set GPR:$Rd, imm0_65535:$imm)]>, Requires<[IsARM, HasV6T2]>, UnaryDP { can be rewritten to this: class PredHasV6T2 { list<Predicate> Predicates = [HasV6T2]; } def MOVi16 : AI1<0b...

...[P2]; // Append P2 to C1's Predicates > } > > - Example 2: > > def D0 : C1, +AddP1; > > > Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as > > def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm), > DPFrm, IIC_iMOVi, > "movw", "\t$Rd, $imm", > [(set GPR:$Rd, imm0_65535:$imm)]>, > Requires<[IsARM, HasV6T2]>, UnaryDP { > > > can be rewritten to this: > > class PredHasV6T2 { > list<Predicate> Predica...

...> > > > - Example 2: > > > > def D0 : C1, +AddP1; > > > > > > Using a real example, MOVi16 (in ARMInstrInfo.td) which is defined as > > > > def MOVi16 : AI1<0b1000, (outs GPR:$Rd), (ins imm0_65535_expr:$imm), > > DPFrm, IIC_iMOVi, > > "movw", "\t$Rd, $imm", > > [(set GPR:$Rd, imm0_65535:$imm)]>, > > Requires<[IsARM, HasV6T2]>, UnaryDP { > > > > > > can be rewritten to this: > > > > class PredHasV6T...

...t through the mail archives, and found this question > answered in Oct 2011 (see below). It is interesting to find this in > the ARM backend, considering your answer. Can you give more > information about for example is this a temporary deficiency in the > DFAPacketizer? What is the IIC_iMOVi itinerary doing below? > > Thanks, > > Jonas > > /Thu Oct 6 15:11:25 CDT 2011:/ > > // > > /Hello Hal./ > > // > > /> Is there a way to express a multiple pipeline itinerary using the/ > > /> current scheme/ > > /Yes, surely/ > > //...

Hi, I looked a bit through the mail archives, and found this question answered in Oct 2011 (see below). It is interesting to find this in the ARM backend, considering your answer. Can you give more information about for example is this a temporary deficiency in the DFAPacketizer? What is the IIC_iMOVi itinerary doing below? Thanks, Jonas Thu Oct 6 15:11:25 CDT 2011: Hello Hal. > Is there a way to express a multiple pipeline itinerary using the > current scheme Yes, surely > (maybe some trick with setting NextCycles = 0)? Yep! > Specifically, consider a case where a floating-p...

Jonas, At this point, the DFA packetizer models a simple VLIW architecture and does not accommodate multiple stages. That's the reason for the behavior you're seeing. -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation *From:*llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On Behalf Of *Jonas

...rote: Hi, I looked a bit through the mail archives, and found this question answered in Oct 2011 (see below). It is interesting to find this in the ARM backend, considering your answer. Can you give more information about for example is this a temporary deficiency in the DFAPacketizer? What is the IIC_iMOVi itinerary doing below? Thanks, Jonas Thu Oct 6 15:11:25 CDT 2011: Hello Hal. > Is there a way to express a multiple pipeline itinerary using the > current scheme Yes, surely > (maybe some trick with setting NextCycles = 0)? Yep! > Specifically, consider a case where a floating-p...