Displaying 4 results from an estimated 4 matches for "iic_div32".
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iic_div16
2012 Aug 21
3
[LLVMdev] Let's get rid of neverHasSideEffects
...), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
"div{w}\t$src", [], IIC_DIV16>, OpSize;
let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in // EDX:EAX/[mem32] = EAX,EDX
def DIV32m : I<0xF7, MRM6m, (outs), (ins i32mem:$src),
"div{l}\t$src", [], IIC_DIV32>;
// RDX:RAX/[mem64] = RAX,RDX
let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in
def DIV64m : RI<0xF7, MRM6m, (outs), (ins i64mem:$src),
"div{q}\t$src", [], IIC_DIV64>;
}
It is a complete coincidence that these instructions happen to be missing neverHasSideEffects...
2012 Aug 21
0
[LLVMdev] Let's get rid of neverHasSideEffects
On Aug 21, 2012, at 2:02 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote:
> All,
>
> TableGen likes to infer the MCID::UnmodeledSideEffects flag from an instruction's pattern. When an instruction doesn't have a pattern, it is assumed to have side effects.
Hi Jakob,
I don't understand what you're saying. Are you proposing that all properties (may load,
2012 Aug 21
0
[LLVMdev] Let's get rid of neverHasSideEffects
...c), // DX:AX/[mem16] = AX,DX
> "div{w}\t$src", [], IIC_DIV16>, OpSize;
> let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in // EDX:EAX/[mem32] = EAX,EDX
> def DIV32m : I<0xF7, MRM6m, (outs), (ins i32mem:$src),
> "div{l}\t$src", [], IIC_DIV32>;
> // RDX:RAX/[mem64] = RAX,RDX
> let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in
> def DIV64m : RI<0xF7, MRM6m, (outs), (ins i64mem:$src),
> "div{q}\t$src", [], IIC_DIV64>;
> }
>
> It is a complete coincidence that these instructions happen...
2012 Aug 21
8
[LLVMdev] Let's get rid of neverHasSideEffects
All,
TableGen likes to infer the MCID::UnmodeledSideEffects flag from an instruction's pattern. When an instruction doesn't have a pattern, it is assumed to have side effects.
It's possible to override this behavior by setting neverHasSideEffects = 1.
It was originally the intention that most instructions have patterns, but that's not the way it worked out. It is often more