search for: ihi0044e

...opher wrote: > > > > On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran > <shankare at codeaurora.org <mailto:shankare at codeaurora.org>> wrote: > > Hi, > > I was looking at the ARM ABI > docs(http://infocenter.arm.__com/help/topic/com.arm.doc.__ihi0044e/IHI0044E_aaelf.pdf > <http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf>) > and they mention. > > "A binary file may use REL or RELA relocations or a mixture of the > two (but multiple relocations for the same > address mus...

Hi, I was looking at the ARM ABI docs(http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf) and they mention. "A binary file may use REL or RELA relocations or a mixture of the two (but multiple relocations for the same address must use only one type)." Does LLVM emit rel/rela relocations with ARM ? Any tests ? Thanks Shankar Easwaran -- Qualcomm Inn...

Hi, I'm building a new backend which can only load very limited range of imm. So I decided to use constant pool, and place constant pool entries close enough to instructions use the entries (we have very limited range PC-relative memory load). However, lld & llc output the object files that gather all constant pool entries into one section. How can I make them mix these entries into code

On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran <shankare at codeaurora.org>wrote: > Hi, > > I was looking at the ARM ABI docs(http://infocenter.arm. > com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf) and they mention. > > "A binary file may use REL or RELA relocations or a mixture of the two > (but multiple relocations for the same > address must use only one type)." > > Does LLVM emit rel/rela relocations with ARM ? > > I hope not. Ew. -er...

...gt; >> On Mon, Nov 4, 2013 at 11:05 AM, Shankar Easwaran >> <shankare at codeaurora.org <mailto:shankare at codeaurora.org>> wrote: >> >> Hi, >> >> I was looking at the ARM ABI >> docs(http://infocenter.arm.__com/help/topic/com.arm.doc.__ihi0044e/IHI0044E_aaelf.pdf >> <http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf>) >> and they mention. >> >> "A binary file may use REL or RELA relocations or a mixture of the >> two (but multiple relocations for the same >...

...tion as constant expressions: > > (sub (add (ptrtoint @foo) 0xeafffffe) cur_pos) > > no? I'm not sure if this would be sufficient. The R_ARM_JUMP24 relocation on ARM has specific semantics to implement ARM/Thumb interworking; see http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf Note that R_ARM_CALL has the same operation but different semantics. I suppose that we could try looking at the addend to decide which relocation to use, but this would mean adding more complexity to the assembler (along with any pattern matching that would need to be done). It s...

On Wed, Aug 26, 2015 at 03:53:33PM -0400, Rafael Espíndola wrote: > > I'm not sure if this would be sufficient. The R_ARM_JUMP24 relocation > > on ARM has specific semantics to implement ARM/Thumb interworking; see > > http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf > > Note that R_ARM_CALL has the same operation but different semantics. > > I suppose that we could try looking at the addend to decide which relocation > > to use, but this would mean adding more complexity to the assembler (along > > with any pattern ma...

Moshe, Nir wrote: [...] > I have a question about the LLVM ARM backend: > > I try to build *.c files for Windows Phone (Windows 8) - so, basically > I need to generate an "arm-pe" file (I *think* it has the same file > structure like x86-pe file, but i am not sure). > unfortunately, LLVM has no support with ARM PE\COFF. We recently ran into this. Unfortunately

...015 at 03:53:33PM -0400, Rafael Espíndola wrote: > >> > I'm not sure if this would be sufficient. The R_ARM_JUMP24 relocation > >> > on ARM has specific semantics to implement ARM/Thumb interworking; see > >> > http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/ > IHI0044E_aaelf.pdf > >> > Note that R_ARM_CALL has the same operation but different semantics. > >> > I suppose that we could try looking at the addend to decide which > relocation > >> > to use, but this would mean adding more complexity to the assemble...

...sure if this would be sufficient. The R_ARM_JUMP24 > relocation > >> >> > on ARM has specific semantics to implement ARM/Thumb interworking; > >> >> > see > >> >> > > >> >> > http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/ > IHI0044E_aaelf.pdf > >> >> > Note that R_ARM_CALL has the same operation but different > semantics. > >> >> > I suppose that we could try looking at the addend to decide which > >> >> > relocation > >> >> > to use, but...

Hi guys, I have a question about the LLVM ARM backend: I try to build *.c files for Windows Phone (Windows 8) - so, basically I need to generate an "arm-pe" file (I *think* it has the same file structure like x86-pe file, but i am not sure). unfortunately, LLVM has no support with ARM PE\COFF. Any ideas? How difficult is to add the support in this file format? (LLC can generate ARM

...t;> >> > on ARM has specific semantics to implement ARM/Thumb > interworking; > >> >> >> > see > >> >> >> > > >> >> >> > > >> >> >> > http://infocenter.arm.com/help/topic/com.arm.doc. > ihi0044e/IHI0044E_aaelf.pdf > >> >> >> > Note that R_ARM_CALL has the same operation but different > >> >> >> > semantics. > >> >> >> > I suppose that we could try looking at the addend to decide > which > >> >> >&g...