Displaying 5 results from an estimated 5 matches for "ihi0042e".
2014 Mar 10
4
[LLVMdev] neon registers llvm using
Hi, Everyone:
Can anyone let me know the default NEON registers llvm going to use with armv7 devices?
For example, d10 and d11 are treated as default zero? I am using Xcode5 + llvm and I got a case that compiler will generate neon codes
" vst.8 {d10, d11}, [r1] "
from C codes:
"int aMV[4];
......
aMV[0] = aMV[1] = aMV[2] = aMV[3] = 0; "
and I
2013 Oct 15
2
[LLVMdev] Unwanted push/pop on Cortex-M.
Hi Andrea,
That is because the LR is the fixed register as per the
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
and out_char() function is not the leaf function ,Hence compiler
tends to save and restore the LR and the save and restore of
register r11 is to align stack for 8 bytes as per ARM EABI.
Thanks
~Umesh
On Tuesday, October 15, 2013, Umesh Kalappa <umesh.kalappa0 at gmai...
2013 Oct 15
1
[LLVMdev] Unwanted push/pop on Cortex-M.
...ed to the encoding T2 (which is a 4
bytes opcode).
> A
>
> On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>
wrote:
>
> Hi Andrea,
>
> That is because the LR is the fixed register as per the
>
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
> and out_char() function is not the leaf function ,Hence compiler
> tends to save and restore the LR and the save and restore of
> register r11 is to align stack for 8 bytes as per ARM EABI.
>
>
>
> Thanks
>
> ~Umesh
>
>
> On Tuesday, Octo...
2013 Oct 15
0
[LLVMdev] Unwanted push/pop on Cortex-M.
...de) as opposed to the encoding T2 (which is a 4
bytes opcode).
A
On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote:
> Hi Andrea,
>
> That is because the LR is the fixed register as per the
>
> http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
> and out_char() function is not the leaf function ,Hence compiler
> tends to save and restore the LR and the save and restore of
> register r11 is to align stack for 8 bytes as per ARM EABI.
>
>
>
> Thanks
>
> ~Umesh
>
>
> On Tuesday, Octo...
2013 Oct 21
1
[LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.
...gt; On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <
>> umesh.kalappa0 at gmail.com> wrote:
>> >
>> > Hi Andrea,
>> >
>> > That is because the LR is the fixed register as per the
>> >
>> http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
>> > and out_char() function is not the leaf function ,Hence compiler
>> > tends to save and restore the LR and the save and restore of
>> > register r11 is to align stack for 8 bytes as per ARM EABI.
>> >
>> >
>> >
>&g...