Displaying 4 results from an estimated 4 matches for "if8".
Did you mean:
if
2007 Apr 23
4
[LLVMdev] Instruction pattern type inference problem
...s that it was able to
before, but I'm not clear on why that's the case.
This isn't just the results of instructions, but also immediate
values as well. It seems to affect a smattering of node types. Any
insights?
For instance:
where GPRegs contains types [i32, f32]
def BEQ : IF8<Opc.BEQ,
(ops GPRegs:$Rsrc1, GPRegs:$Rsrc2, brtarget:$SImm16),
"beq $Rsrc1, $Rsrc2, $SImm16",
[(brcond (i32 (seteq GPRegs:$Rsrc1, GPRegs:$Rsrc2)), bb:
$SImm16)], s_br>;
Tablegen reports:
BEQ: (brcond:void (setcc:i32 GPRegs:i32:$Rsrc1, GPRe...
2007 Apr 23
0
[LLVMdev] Instruction pattern type inference problem
...m not clear on why that's the case.
ok
> This isn't just the results of instructions, but also immediate
> values as well. It seems to affect a smattering of node types. Any
> insights?
>
> For instance:
>
> where GPRegs contains types [i32, f32]
>
> def BEQ : IF8<Opc.BEQ,
> (ops GPRegs:$Rsrc1, GPRegs:$Rsrc2, brtarget:$SImm16),
> "beq $Rsrc1, $Rsrc2, $SImm16",
> [(brcond (i32 (seteq GPRegs:$Rsrc1, GPRegs:$Rsrc2)), bb:
> $SImm16)], s_br>;
>
> Tablegen reports:
> BEQ: (brcond:void (set...
2007 Apr 23
1
[LLVMdev] Instruction pattern type inference problem
...ok
>
>> This isn't just the results of instructions, but also immediate
>> values as well. It seems to affect a smattering of node types. Any
>> insights?
>>
>> For instance:
>>
>> where GPRegs contains types [i32, f32]
>>
>> def BEQ : IF8<Opc.BEQ,
>> (ops GPRegs:$Rsrc1, GPRegs:$Rsrc2, brtarget:$SImm16),
>> "beq $Rsrc1, $Rsrc2, $SImm16",
>> [(brcond (i32 (seteq GPRegs:$Rsrc1, GPRegs:$Rsrc2)), bb:
>> $SImm16)], s_br>;
>>
>> Tablegen reports:
>&g...
2007 Apr 23
0
[LLVMdev] Instruction pattern type inference problem
...t clear on why that's the case.
>
> This isn't just the results of instructions, but also immediate
> values as well. It seems to affect a smattering of node types. Any
> insights?
>
> For instance:
>
> where GPRegs contains types [i32, f32]
>
> def BEQ : IF8<Opc.BEQ,
> (ops GPRegs:$Rsrc1, GPRegs:$Rsrc2, brtarget:$SImm16),
> "beq $Rsrc1, $Rsrc2, $SImm16",
> [(brcond (i32 (seteq GPRegs:$Rsrc1, GPRegs:$Rsrc2)), bb:
> $SImm16)], s_br>;
>
> Tablegen reports:
> BEQ: (brcond:void (se...