Displaying 16 results from an estimated 16 matches for "if0001".
2016 Mar 21
28
[PATCH v2 00/22] Volting/Clocking improvements for Fermi and newer
...ents I found on my gpu
clk: save the max clock we can set
clk: add nvkm_clk_reclock function
nvif: add boost info and set operations
debugfs: add boost interface to change the boost_mode
bin/nv_cmp_volt.c | 130 +++++++++++++++++++++
drm/nouveau/include/nvif/if0001.h | 15 +++
drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 ++++
drm/nouveau/include/nvkm/subdev/bios/vmap.h | 4 +-
drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +-
drm/nouveau/include/nvkm/subdev/clk.h | 12 +-
drm/nouveau/include/nvkm/subdev/v...
2018 Jul 12
3
[PATCH 0/2] drm/nouveau: Add support for dp_mst_info in debugfs
This hooks up the DRM helpers for dumping information on the current
status of each MST topology from nouveau's perspective to debugfs files,
similar to what i915 does (albeit, i915 labels their debugfs node for
this as i915_dp_mst_info).
Lyude Paul (2):
drm/nouveau: Expose nv50 MST structures in disp.h
drm/nouveau: Hook up dp_mst_info in debugfs
drivers/gpu/drm/nouveau/dispnv50/disp.c
2016 Apr 07
29
[PATCH v3 00/29] Volting/Clocking improvements for Fermi and newer
...ld information about the current cstate status
clk: we should pass the pstate id around not the index in the list
clk: only do partial reclocks as required
therm: trigger reclock in temperature daemon
bin/nv_cmp_volt.c | 130 +++++++++
drm/nouveau/include/nvif/if0001.h | 15 ++
drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 ++
drm/nouveau/include/nvkm/subdev/bios/vmap.h | 5 +-
drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +-
drm/nouveau/include/nvkm/subdev/clk.h | 23 +-
drm/nouveau/include/nvkm/subdev/volt...
2015 Nov 26
0
[libdrm 09/13] nouveau: import and install a selection of nvif headers from the kernel
...lass.h
new file mode 100644
index 0000000..4179cd6
--- /dev/null
+++ b/nouveau/nvif/class.h
@@ -0,0 +1,141 @@
+#ifndef __NVIF_CLASS_H__
+#define __NVIF_CLASS_H__
+
+/* these class numbers are made up by us, and not nvidia-assigned */
+#define NVIF_CLASS_CONTROL /* if0001.h */ -1
+#define NVIF_CLASS_PERFMON /* if0002.h */ -2
+#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
+#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
+#define NVIF_CLASS_SW_NV10...
2017 Nov 17
35
[PATCH 00/32] Updated State of my clk patches
...the boost_mode
bios/vpstate: Parse max battery id
clk: Implement limiting pstates just like we do for cstates
clk: Limit clocks on battery
secboot/acr352: Reset PMU after secboot
device: Enable clk for Maxwell2
clk: Add trace message when setting a new cstate
drm/nouveau/include/nvif/if0001.h | 15 +
drm/nouveau/include/nvkm/core/device.h | 2 +-
drm/nouveau/include/nvkm/subdev/bios/boost.h | 2 +-
drm/nouveau/include/nvkm/subdev/bios/perf.h | 2 +-
.../include/nvkm/subdev/bios/thermal_policies.h | 25 ++
drm/nouveau/include/nvkm/su...
2017 Sep 15
42
[RFC PATCH 00/29] Current State of my clk patches
.../vpstate: parse max battery id
clk: refactor the base and boost clock limits so that we can limit
pstates as well
clk: implement limiting pstates just like we do for cstates
clk: move the switch out of the loop in nvkm_cstate_valid
clk: limit clocks on battery
drm/nouveau/include/nvif/if0001.h | 15 +
drm/nouveau/include/nvkm/core/device.h | 2 +-
.../include/nvkm/subdev/bios/thermal_policies.h | 27 ++
drm/nouveau/include/nvkm/subdev/bios/vpstate.h | 1 +
drm/nouveau/include/nvkm/subdev/clk.h | 23 +-
drm/nouveau/include/nvkm/sub...
2018 Sep 09
2
[Bug 107874] New: Incorrect SPDX-License-Identifier on various nouveau drm kernel source files?
...nt.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/device.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/driver.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/event.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0000.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0001.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0002.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0003.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0004.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/if0005.h:/* SPDX-License-Identifier: GPL-2.0 */
include/nvif/i...
2019 Jun 20
2
[PATCH] drm/nouveau: fix bogus GPL-2 license header
...nclude/nvif/device.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/driver.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/event.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0000.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0001.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0002.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0003.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0004.h | 2 +-
drivers/gpu/drm/nouveau/include/nvif/if0005.h...
2015 Dec 16
16
[libdrm v3 01/14] nouveau: import and install a selection of nvif headers from the kernel
...lass.h
new file mode 100644
index 0000000..4179cd6
--- /dev/null
+++ b/nouveau/nvif/class.h
@@ -0,0 +1,141 @@
+#ifndef __NVIF_CLASS_H__
+#define __NVIF_CLASS_H__
+
+/* these class numbers are made up by us, and not nvidia-assigned */
+#define NVIF_CLASS_CONTROL /* if0001.h */ -1
+#define NVIF_CLASS_PERFMON /* if0002.h */ -2
+#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
+#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
+#define NVIF_CLASS_SW_NV10...
2016 Apr 18
63
[PATCH v4 00/37] Volting/Clocking improvements for Fermi and newer
...m: trigger reclock in temperature daemon
mc: fix NULL pointer access in libnouveau
clk: set clocks to pre suspend state after suspend
WIP volt/gk104: readout speedo
volt: add NvVoltOffsetmV option
bin/nv_cmp_volt.c | 139 +++++++++++
drm/nouveau/include/nvif/if0001.h | 15 ++
drm/nouveau/include/nvkm/subdev/bios/baseclock.h | 24 ++
drm/nouveau/include/nvkm/subdev/bios/vmap.h | 5 +-
drm/nouveau/include/nvkm/subdev/bios/volt.h | 5 +-
drm/nouveau/include/nvkm/subdev/clk.h | 23 +-
drm/nouveau/include/nvkm/subdev/volt...
2016 Feb 08
4
[PATCH 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience
Anyway there are still some issues I would like to discuss:
1. currently the
2016 Feb 16
4
[PATCH v2 0/4] PMU engine counters
these are usually used for dynamic reclocking on gt215 and newer
The counters are used to get the load of the core, memory, video and pcie loads
currently I expose the loads through a debugfs "current_load" file, but I want
to move that to nvif and just add a wrapper around that in debugfs for
convenience. Using nvif would have the advantage, that userspace tools can
easily get loads
2015 Nov 27
14
[libdrm v2 01/14] nouveau: import and install a selection of nvif headers from the kernel
...lass.h
new file mode 100644
index 0000000..4179cd6
--- /dev/null
+++ b/nouveau/nvif/class.h
@@ -0,0 +1,141 @@
+#ifndef __NVIF_CLASS_H__
+#define __NVIF_CLASS_H__
+
+/* these class numbers are made up by us, and not nvidia-assigned */
+#define NVIF_CLASS_CONTROL /* if0001.h */ -1
+#define NVIF_CLASS_PERFMON /* if0002.h */ -2
+#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
+#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
+#define NVIF_CLASS_SW_NV10...
2015 Nov 26
18
[libdrm 01/13] nouveau: move more abi16-specific logic into abi16.c
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
nouveau/abi16.c | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++-----
nouveau/nouveau.c | 56 +++++++------------------------------------------
nouveau/private.h | 7 ++-----
3 files changed, 67 insertions(+), 58 deletions(-)
diff --git a/nouveau/abi16.c b/nouveau/abi16.c
index
2017 May 07
6
[RFC v2 0/6] PMU engine counters
reworked this series quite a lot.
Now we want the Host to configure the counters through the PMU.
The series isn't complete though because it needs:
1. reordering
2. better commit messages
but I felt like sending those out before doing a final version.
I also found some weird register overwriting issue on the PMU I have to track
down, because it interfers with the counter read out. I am
2017 Jun 05
7
[PATCH v3 0/7] PMU engine counters
I think I am done reworking the series and getting to a point where I think
it is basically finished. The configuration of the slots could be improved
later on when working on dynamic reclocking, but for now it's good enough to
report the current GPU utilization to userspace.
Patches 1-4 imeplement PMU commands to setup and readout the counters.
Patches 5-6 lets Nouveau make use of 1-4.
Patch