search for: idt_64

Displaying 20 results from an estimated 25 matches for "idt_64".

2020 Apr 28
0
[PATCH v3 13/75] x86/boot/compressed/64: Add IDT Infrastructure
...of the decompression area. This allows to setup different IDT handlers before and after the relocation. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/head_64.S | 25 +++++++- arch/x86/boot/compressed/idt_64.c | 43 ++++++++++++++ arch/x86/boot/compressed/idt_handlers_64.S | 69 ++++++++++++++++++++++ arch/x86/boot/compressed/misc.h | 5 ++ arch/x86/include/asm/desc_defs.h | 3 + 6 files changed, 145 insertions(+), 1 deletion(-) create mode 100644 arch/x86/boot/compress...
2020 Feb 11
0
[PATCH 08/62] x86/boot/compressed/64: Add IDT Infrastructure
...the decompression area. This allows to setup different IDT handlers before and after the relocation. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/head_64.S | 34 +++++++++++ arch/x86/boot/compressed/idt_64.c | 43 +++++++++++++ arch/x86/boot/compressed/idt_handlers_64.S | 71 ++++++++++++++++++++++ arch/x86/boot/compressed/misc.h | 5 ++ arch/x86/include/asm/desc_defs.h | 3 + 6 files changed, 157 insertions(+) create mode 100644 arch/x86/boot/compressed/idt_64.c cre...
2020 Jul 14
0
[PATCH v4 14/75] x86/boot/compressed/64: Add page-fault handler
...-ES machines use the exception handling infrastructure in the pre-decompressions boot code too, making it less likely to break in the future. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/ident_map_64.c | 39 ++++++++++++++++++++++ arch/x86/boot/compressed/idt_64.c | 2 ++ arch/x86/boot/compressed/idt_handlers_64.S | 2 ++ arch/x86/boot/compressed/misc.h | 6 ++++ 4 files changed, 49 insertions(+) diff --git a/arch/x86/boot/compressed/ident_map_64.c b/arch/x86/boot/compressed/ident_map_64.c index d9932a133ac9..e3d980ae9c2b 100644 ---...
2020 Apr 02
0
[PATCH 14/70] x86/boot/compressed/64: Add page-fault handler
...ling > infrastructure in the pre-decompressions boot code too, making it less > likely to break in the future. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- > arch/x86/boot/compressed/ident_map_64.c | 38 ++++++++++++++++++++++ > arch/x86/boot/compressed/idt_64.c | 2 ++ > arch/x86/boot/compressed/idt_handlers_64.S | 2 ++ > arch/x86/boot/compressed/misc.h | 6 ++++ > 4 files changed, 48 insertions(+) > > diff --git a/arch/x86/boot/compressed/ident_map_64.c b/arch/x86/boot/compressed/ident_map_64.c > index 3a21155...
2020 Apr 28
0
[PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler
.... The stage 1 handler is limited to the MSR based protocol to talk to the hypervisor and can only support CPUID exit-codes, but that is enough to get to stage 2. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/idt_64.c | 4 ++ arch/x86/boot/compressed/idt_handlers_64.S | 4 ++ arch/x86/boot/compressed/misc.h | 1 + arch/x86/boot/compressed/sev-es.c | 45 +++++++++++++++ arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/sev-es.h | 37 ++++++++++++...
2020 Feb 11
0
[PATCH 14/62] x86/boot/compressed/64: Add stage1 #VC handler
.... The stage 1 handler is limited to the MSR based protocol to talk to the hypervisor and can only support CPUID exit-codes, but that is enough to get to stage 2. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/idt_64.c | 4 ++ arch/x86/boot/compressed/idt_handlers_64.S | 4 ++ arch/x86/boot/compressed/misc.h | 1 + arch/x86/boot/compressed/sev-es.c | 42 ++++++++++++++ arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/sev-es.h | 45 +++++++++++++...
2020 Sep 07
0
[PATCH v7 19/72] x86/boot/compressed/64: Add stage1 #VC handler
.... The stage 1 handler is limited to the MSR based protocol to talk to the hypervisor and can only support CPUID exit-codes, but that is enough to get to stage 2. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/idt_64.c | 4 ++ arch/x86/boot/compressed/idt_handlers_64.S | 4 ++ arch/x86/boot/compressed/misc.h | 1 + arch/x86/boot/compressed/sev-es.c | 45 +++++++++++++++ arch/x86/include/asm/msr-index.h | 1 + arch/x86/include/asm/sev-es.h | 37 ++++++++++++...
2020 Feb 11
2
[PATCH 14/62] x86/boot/compressed/64: Add stage1 #VC handler
...to the MSR based protocol to talk to > the hypervisor and can only support CPUID exit-codes, but that is > enough to get to stage 2. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- > arch/x86/boot/compressed/Makefile | 1 + > arch/x86/boot/compressed/idt_64.c | 4 ++ > arch/x86/boot/compressed/idt_handlers_64.S | 4 ++ > arch/x86/boot/compressed/misc.h | 1 + > arch/x86/boot/compressed/sev-es.c | 42 ++++++++++++++ > arch/x86/include/asm/msr-index.h | 1 + > arch/x86/include/asm/sev-es.h...
2020 Feb 11
2
[PATCH 14/62] x86/boot/compressed/64: Add stage1 #VC handler
...to the MSR based protocol to talk to > the hypervisor and can only support CPUID exit-codes, but that is > enough to get to stage 2. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- > arch/x86/boot/compressed/Makefile | 1 + > arch/x86/boot/compressed/idt_64.c | 4 ++ > arch/x86/boot/compressed/idt_handlers_64.S | 4 ++ > arch/x86/boot/compressed/misc.h | 1 + > arch/x86/boot/compressed/sev-es.c | 42 ++++++++++++++ > arch/x86/include/asm/msr-index.h | 1 + > arch/x86/include/asm/sev-es.h...
2020 May 12
2
[PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...by decoding > the instruction that caused the exception and error handling. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- > arch/x86/Kconfig | 1 + > arch/x86/boot/compressed/Makefile | 3 + > arch/x86/boot/compressed/idt_64.c | 4 + > arch/x86/boot/compressed/idt_handlers_64.S | 3 +- > arch/x86/boot/compressed/misc.c | 7 + > arch/x86/boot/compressed/misc.h | 7 + > arch/x86/boot/compressed/sev-es.c | 110 +++++++++++++++ > arch/x86/include/asm/sev-es.h...
2020 May 12
2
[PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...by decoding > the instruction that caused the exception and error handling. > > Signed-off-by: Joerg Roedel <jroedel at suse.de> > --- > arch/x86/Kconfig | 1 + > arch/x86/boot/compressed/Makefile | 3 + > arch/x86/boot/compressed/idt_64.c | 4 + > arch/x86/boot/compressed/idt_handlers_64.S | 3 +- > arch/x86/boot/compressed/misc.c | 7 + > arch/x86/boot/compressed/misc.h | 7 + > arch/x86/boot/compressed/sev-es.c | 110 +++++++++++++++ > arch/x86/include/asm/sev-es.h...
2020 Feb 11
0
[PATCH 18/62] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...ception that uses a GHCB. Also add the infrastructure for handling different exit-codes by decoding the instruction that caused the exception and error handling. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/Kconfig | 1 + arch/x86/boot/compressed/idt_64.c | 4 + arch/x86/boot/compressed/idt_handlers_64.S | 1 + arch/x86/boot/compressed/misc.h | 1 + arch/x86/boot/compressed/sev-es.c | 91 +++++++++++ arch/x86/include/asm/sev-es.h | 33 ++++ arch/x86/include/uapi/asm/svm.h | 1 + arch/x...
2020 Feb 11
1
[PATCH 08/62] x86/boot/compressed/64: Add IDT Infrastructure
...ch is after > EfiExitBootServices() has been called, and later reloaded when the > kernel image has been relocated to the end of the decompression area. > > This allows to setup different IDT handlers before and after the > relocation. > > diff --git a/arch/x86/boot/compressed/idt_64.c b/arch/x86/boot/compressed/idt_64.c > new file mode 100644 > index 000000000000..46ecea671b90 > --- /dev/null > +++ b/arch/x86/boot/compressed/idt_64.c > @@ -0,0 +1,43 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +#include <asm/trap_defs.h> > +#include <asm/se...
2020 Apr 28
0
[PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...e for handling different exit-codes by decoding the instruction that caused the exception and error handling. Signed-off-by: Joerg Roedel <jroedel at suse.de> --- arch/x86/Kconfig | 1 + arch/x86/boot/compressed/Makefile | 3 + arch/x86/boot/compressed/idt_64.c | 4 + arch/x86/boot/compressed/idt_handlers_64.S | 3 +- arch/x86/boot/compressed/misc.c | 7 + arch/x86/boot/compressed/misc.h | 7 + arch/x86/boot/compressed/sev-es.c | 110 +++++++++++++++ arch/x86/include/asm/sev-es.h | 39 ++++++...
2020 Jul 14
0
[PATCH v4 13/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c
...$(obj)/head_$(BITS).o vmlinux-objs-$(CONFIG_EARLY_PRINTK) += $(obj)/early_serial_console.o vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/kaslr.o ifdef CONFIG_X86_64 - vmlinux-objs-$(CONFIG_RANDOMIZE_BASE) += $(obj)/kaslr_64.o + vmlinux-objs-y += $(obj)/ident_map_64.o vmlinux-objs-y += $(obj)/idt_64.o $(obj)/idt_handlers_64.o vmlinux-objs-y += $(obj)/mem_encrypt.o vmlinux-objs-y += $(obj)/pgtable_64.o diff --git a/arch/x86/boot/compressed/kaslr_64.c b/arch/x86/boot/compressed/ident_map_64.c similarity index 95% rename from arch/x86/boot/compressed/kaslr_64.c rename to arch/x86/boot/compres...
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
...e arch/x86/Kconfig | 1 + arch/x86/boot/Makefile | 2 +- arch/x86/boot/compressed/Makefile | 8 +- arch/x86/boot/compressed/head_64.S | 41 ++ arch/x86/boot/compressed/ident_map_64.c | 320 +++++++++ arch/x86/boot/compressed/idt_64.c | 53 ++ arch/x86/boot/compressed/idt_handlers_64.S | 78 +++ arch/x86/boot/compressed/kaslr.c | 36 +- arch/x86/boot/compressed/kaslr_64.c | 156 ----- arch/x86/boot/compressed/misc.h | 34 +- arch/x86/boot/compressed/sev-es.c | 148 ++++ arch/x8...
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
...e arch/x86/Kconfig | 1 + arch/x86/boot/Makefile | 2 +- arch/x86/boot/compressed/Makefile | 8 +- arch/x86/boot/compressed/head_64.S | 41 ++ arch/x86/boot/compressed/ident_map_64.c | 320 +++++++++ arch/x86/boot/compressed/idt_64.c | 53 ++ arch/x86/boot/compressed/idt_handlers_64.S | 78 +++ arch/x86/boot/compressed/kaslr.c | 36 +- arch/x86/boot/compressed/kaslr_64.c | 156 ----- arch/x86/boot/compressed/misc.h | 34 +- arch/x86/boot/compressed/sev-es.c | 148 ++++ arch/x8...
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
...+ arch/x86/boot/Makefile | 2 +- arch/x86/boot/compressed/Makefile | 9 +- arch/x86/boot/compressed/cpuflags.c | 4 - arch/x86/boot/compressed/head_64.S | 32 +- arch/x86/boot/compressed/ident_map_64.c | 349 +++++ arch/x86/boot/compressed/idt_64.c | 54 + arch/x86/boot/compressed/idt_handlers_64.S | 77 ++ arch/x86/boot/compressed/kaslr.c | 36 +- arch/x86/boot/compressed/kaslr_64.c | 153 --- arch/x86/boot/compressed/misc.c | 7 + arch/x86/boot/compressed/misc.h | 50 +- arch/x86...
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
...arch/x86/Kconfig | 1 + arch/x86/boot/Makefile | 2 +- arch/x86/boot/compressed/Makefile | 9 +- arch/x86/boot/compressed/head_64.S | 32 +- arch/x86/boot/compressed/ident_map_64.c | 349 +++++ arch/x86/boot/compressed/idt_64.c | 54 + arch/x86/boot/compressed/idt_handlers_64.S | 77 ++ arch/x86/boot/compressed/kaslr.c | 36 +- arch/x86/boot/compressed/kaslr_64.c | 153 --- arch/x86/boot/compressed/misc.c | 7 + arch/x86/boot/compressed/misc.h | 45 +- arch/x86...
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
...arch/x86/Kconfig | 1 + arch/x86/boot/Makefile | 2 +- arch/x86/boot/compressed/Makefile | 9 +- arch/x86/boot/compressed/head_64.S | 32 +- arch/x86/boot/compressed/ident_map_64.c | 349 +++++ arch/x86/boot/compressed/idt_64.c | 54 + arch/x86/boot/compressed/idt_handlers_64.S | 77 ++ arch/x86/boot/compressed/kaslr.c | 36 +- arch/x86/boot/compressed/kaslr_64.c | 153 --- arch/x86/boot/compressed/misc.c | 7 + arch/x86/boot/compressed/misc.h | 45 +- arch/x86...