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2014 Feb 08
2
[LLVMdev] selecting ISD node - help
...in X86DAGToDAGISel::Select for ISD::RDMSR. Now I know rdmsr works like so: mov r/ecx, <id> rdmsr r/eax holds the lower 32/64 bit >From what I understood this needs a Token Factor node, nodes which are dependent on each other? case X86ISD::RDMSR: { unsigned idReg; SDValue idRegValue; unsigned resultReg; SDLoc dl = SDLoc(Node); SDValue id = Node->getOperand(0); EVT resultType = Node->getValueType(0); if(Subtarget->is64Bit()) { idReg = X86::RCX; resultReg = X86::RAX; } else { idReg = X86::ECX; resultReg = X86::EAX; }...
2014 Feb 08
2
[LLVMdev] selecting ISD node - help
...I think it supposed to look like (attached the picture below). if(Subtarget->is64Bit()) { idReg = X86::RCX; resultReg = MF.addLiveIn(X86::RAX, &X86::GR64RegClass); } else { idReg = X86::ECX; resultReg = MF.addLiveIn(X86::EAX, &X86::GR32RegClass); } idRegValue = CurDAG->getRegister(idReg, resultType); SDValue setIdNode = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, idRegValue, id, SDValue()); SDValue rdmsrNode = SDValue(CurDAG->getMachineNode(X86::RDMSR, dl, MVT::Glue, setIdNode.getValue(1)), 0); SDValue resultNode = CurDAG-&gt...