search for: idivl

..._10StyleImageE ## BB#0: pushq %r14 pushq %rbx subq $8, %rsp movq %rsi, %rbx movq %rdi, %r14 movq %rdx, %rdi movq %rcx, %rsi callq __ZN7WebCore4viziEPKNS_20RenderBoxModelObjectEPNS_10StyleImageE movq %rax, %rcx shrq $32, %rcx testl %ecx, %ecx je LBB0_2 ## BB#1: imull (%rbx), %eax cltd idivl %ecx movl %eax, (%r14) LBB0_2: addq $8, %rsp popq %rbx popq %r14 ret $ llc opt-fail.ll -o - .section __TEXT,__text,regular,pure_instructions .globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE .align 4, 0x90 __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEP...

...t; movq %rsi, %rbx > movq %rdi, %r14 > movq %rdx, %rdi > movq %rcx, %rsi > callq __ZN7WebCore4viziEPKNS_20RenderBoxModelObjectEPNS_10StyleImageE > movq %rax, %rcx > shrq $32, %rcx > testl %ecx, %ecx > je LBB0_2 > ## BB#1: > imull (%rbx), %eax > cltd > idivl %ecx > movl %eax, (%r14) > LBB0_2: > addq $8, %rsp > popq %rbx > popq %r14 > ret > > > $ llc opt-fail.ll -o - > > .section __TEXT,__text,regular,pure_instructions > .globl __ZN7WebCore6kolos1ERiS0_PKNS_20RenderBoxModelObjectEPNS_10StyleImageE > .ali...

...ed char' division routine: signed char sdiv(signed char x, signed char y) { return x / y; } On my Fedora 16 Linux host GCC 4.6.2 produces: sdiv: .LFB11: .cfi_startproc movsbl %dil, %eax movsbl %sil, %esi movl %eax, %edx sarl $31, %edx idivl %esi ret where as clang 2.9 produces: sdiv: # @sdiv .Leh_func_begin0: # BB#0: movl %edi, %eax cltd idivl %esi movsbl %al, %eax ret GCC assumes the parameters have *not* been sign extended and assumes it is...

...ovl 16(%esp), %edi movl (%edi,%esi,4), %ecx leal (%ecx,%ecx), %eax cmpl $-14, %eax jl .LBB0_2 # BB#1: # %if.then movl $2147483647, %eax # imm = 0x7FFFFFFF addl phi, %eax cltd idivl %ecx movl %eax, sum movl (%edi,%esi,4), %ecx .LBB0_2: # %if.end leal (,%ecx,4), %eax cmpl $-14, %eax jl .LBB0_4 # BB#3: # %if.then5 movl $2147483647, %eax # imm...

...t;> movq %rdx, %rdi >> movq %rcx, %rsi >> callq __ZN7WebCore4viziEPKNS_20RenderBoxModelObjectEPNS_10StyleImageE >> movq %rax, %rcx >> shrq $32, %rcx >> testl %ecx, %ecx >> je LBB0_2 >> ## BB#1: >> imull (%rbx), %eax >> cltd >> idivl %ecx >> movl %eax, (%r14) >> LBB0_2: >> addq $8, %rsp >> popq %rbx >> popq %r14 >> ret >> >> >> $ llc opt-fail.ll -o - >> >> .section __TEXT,__text,regular,pure_instructions >> .globl __ZN7WebCore6kolos1ERiS0_PKNS_20R...

...p_lo DFPRegs:$src))) 2) Create a node similar to copytoreg that has two results. This has the advantage that it is possible to select fmrrd. I am currently trying to implement 2, but I am not sure how to declare an instruction that has two results. There are some combined mod/rem instruction like idivl, but they have fixed defs (EAX, EDX). I have just committed a partial version that doesn't declare fmrrd as defining its two integer arguments. Currently this is only used during returns and the function is marked as defining R0 and R1, so this shouldn't be a problem, How can I fix the de...

...x, signed char y) > { >  return x / y; > } > > On my Fedora 16 Linux host GCC 4.6.2 produces: > > sdiv: > .LFB11: >        .cfi_startproc >        movsbl  %dil, %eax >        movsbl  %sil, %esi >        movl    %eax, %edx >        sarl    $31, %edx >        idivl   %esi >        ret > > where as clang 2.9 produces: > > sdiv:                                   # @sdiv > .Leh_func_begin0: > # BB#0: >        movl    %edi, %eax >        cltd >        idivl   %esi >        movsbl  %al, %eax >        ret > > GCC assumes th...

...application hangs. For eg., even in Notepad, when I click File-> Open, wine shows the following error. --------- wine: Unhandled exception (thread 000b), starting debugger... WineDbg starting on pid 0xa Unhandled exception: divide by zero in 32-bit code (0x403a5ff5). In 32 bit mode. 0x403a5ff5: idivl 0xffffffc4(%ebp),%eax Wine-dbg> -------------- But the problem does not exist for older wine releases. Eg: wine-20030508. I guess, the reason for the bug is with the config file. Regards, Saravanan ______________________________________ Scanned and protected by Email scanner

...(0x00503849) 11 0x004a915c in esispen (+0xa915c) (0x004a915c) 12 0x0040578a in esispen (+0x578a) (0x0040578a) 13 0x004a932c in esispen (+0xa932c) (0x004a932c) 14 0x004a98ff in esispen (+0xa98ff) (0x004a98ff) 15 0x6001f9d7 wine_switch_to_stack+0x17 in libwine.so.1 (0x6001f9d7) 0x00480eb8: idivl 0x12d(%ebx),%eax Modules: Module Address Debug info Name (72 modules) PE 400000-ca3000 Export esispen ELF 60000000-60017000 Deferred ld-linux.so.2 ELF 60018000-60129000 Export libwine.so.1 ELF 6012f000-6013a000 Deferred libgcc_s.so.1 ELF 6013a000-6014c000 Deferred...

...__ __volatile__ ( "movl %1, %%r15d;" "movl %2, %%ecx;" "CONTD: cmpl $0, %%ecx;" "je DONE;" "xorl %%r13d, %%r13d;" "idivl %%ecx;" "movl %%ecx, %%r15d;" "movl %%r13d, %%ecx;" "jmp CONTD;" "DONE: movl %%r15d, %0;" : "=g" (result) : "g" (a), "g"...

...t i32 %tmp2 unwindblock: unwind } And here is the resulting x86 code (Llabel1 was supposed to be before the {ctld, idvl} and Llabel2 which was after is not generated) test: .Leh_func_begin1: .Llabel4: movl $2, %eax movl 4(%esp), %ecx cltd idivl %ecx .Llabel1: .LBB1_1: # continue ret .LBB1_2: # unwindblock Thanks Duncan, Nicolas

...1>>32) into %ecx, but is using the wrong input value since %rax has been clobbered by the above code, and further is clobbering the value in %eax computed above, which is implicit input to the divide. This is some kind of back end error, probably register allocator. > cltd > idivl %ecx

...Create a node similar to copytoreg that has two results. This has > the advantage that it is possible to select fmrrd. > > I am currently trying to implement 2, but I am not sure how to declare > an instruction that has two results. There are some combined mod/rem > instruction like idivl, but they have fixed defs (EAX, EDX). Unfortunately, you can't do this elegantly in tblgen. You'd want to create an arm-local node at lowering time, then use custom C++ code to match it. The X86 backend has some examples of how to write the custom matching code, but it's not for t...

...; > "movl %2, %%ecx;" > > "CONTD: cmpl $0, %%ecx;" > > "je DONE;" > > "xorl %%r13d, %%r13d;" > > "idivl %%ecx;" > > "movl %%ecx, %%r15d;" > > "movl %%r13d, %%ecx;" > > "jmp CONTD;" > > "DONE: movl %%r15d, %0;" : "=g" (re...

...:0xc315b7e0 frame pointer = 0x28:0xc315b880 code segment = base 0x0, limit 0xfffff, type 0x1b = DPL 0, pres 1, def32 1, gran 1 processor eflags = interrupt enabled, resume, IOPL = 0 current process = 1 (swapper) [thread pid 1 tid 100007 ] Stopped at 0xc0542ca9 = mountnfs+0x139: idivl %ecx,%eax db> ~ [EOT]

...__ __volatile__ ( "movl %1, %%r15d;" "movl %2, %%ecx;" "CONTD: cmpl $0, %%ecx;" "je DONE;" "xorl %%r13d, %%r13d;" "idivl %%ecx;" "movl %%ecx, %%r15d;" "movl %%r13d, %%ecx;" "jmp CONTD;" "DONE: movl %%r15d, %0;" : "=g" (result) : "g" (a), "g"...

Hi Nicolas, > In order to have exceptions for non-call instructions (such as sdiv, > load or stores), I'm modifying codegen so that it generates a BeginLabel > and an EndLabel between the "may throwing" instruction. This is what the > codegen of an InvokeInst does. the rule is that all instructions between eh begin labelN and eh end labelN must unwind to the same

...0033f6dc) 8 0x7eb9e4fd in user32 (+0x7e4fd) (0x0033f73c) 9 0x7eb9e90e SendMessageA+0x4e() in user32 (0x0033f77c) 10 0x0057d816 in bobcad21 (+0x17d816) (0x0242c118) 11 0x00000002 (0x00c90418) 12 0x005617a0 in bobcad21 (+0x1617a0) (0x005618a0) 13 0x08244c8b (0x0c24448b) 0x7e558660: idivl 0xffffffd4(%ebp),%eax Modules: Module Address Debug info Name (119 modules) PE 340000- 3b3000 Deferred iges_nmtlibr PE 3c0000- 3e9000 Deferred sw_nmtlibr PE 400000- 17f1000 Export bobcad21 PE 1800000- 19c6000 Deferred nlibr PE 19d0000- 1b1e000 Deferr...

...__ __volatile__ ( "movl %1, %%r15d;" "movl %2, %%ecx;" "CONTD: cmpl $0, %%ecx;" "je DONE;" "xorl %%r13d, %%r13d;" "idivl %%ecx;" "movl %%ecx, %%r15d;" "movl %%r13d, %%ecx;" "jmp CONTD;" "DONE: movl %%r15d, %0;" : "=g" (result) : "g" (a), "g"...

...__ __volatile__ ( "movl %1, %%r15d;" "movl %2, %%ecx;" "CONTD: cmpl $0, %%ecx;" "je DONE;" "xorl %%r13d, %%r13d;" "idivl %%ecx;" "movl %%ecx, %%r15d;" "movl %%r13d, %%ecx;" "jmp CONTD;" "DONE: movl %%r15d, %0;" : "=g" (result) : "g" (a), "g"...