Displaying 3 results from an estimated 3 matches for "id1164".
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2013 Dec 17
0
[LLVMdev] Intrinsics __readeflags and __writeeflags
...AC? Even DF is typically scratch, and could be used for an -Oz
memmove lowering for example.
I don't think LLVM will ever really support capturing ALU flags from
previous ops without "using" the operation. LLVM does have overflow
intrinsics though:
http://llvm.org/docs/LangRef.html#id1164
On Tue, Dec 17, 2013 at 1:02 AM, Alexey Volkov <avolkov.intel at gmail.com>wrote:
> Hello all,
>
> I am trying to implement intrinsics __readeflags and __writeeflags reading
> and writing EFLAGS register on x86.
> These intrinsics expand to two instructions popf and push to...
2013 Dec 17
2
[LLVMdev] Intrinsics __readeflags and __writeeflags
Hello all,
I am trying to implement intrinsics __readeflags and __writeeflags reading
and writing EFLAGS register on x86.
These intrinsics expand to two instructions popf and push to register for
__readeflags and pushf and pop to register for __writeeflags.
These instructions are not connected explicitly so I can't use patterns in
.td file to match intrinsics.
I tried to implement custom
2013 Dec 17
2
[LLVMdev] Intrinsics __readeflags and __writeeflags
...atch, and could be used for an -Oz
> memmove lowering for example.
>
> I don't think LLVM will ever really support capturing ALU flags from
> previous ops without "using" the operation. LLVM does have overflow
> intrinsics though:
> http://llvm.org/docs/LangRef.html#id1164
>
>
> On Tue, Dec 17, 2013 at 1:02 AM, Alexey Volkov <avolkov.intel at gmail.com>wrote:
>
>> Hello all,
>>
>> I am trying to implement intrinsics __readeflags and __writeeflags
>> reading and writing EFLAGS register on x86.
>> These intrinsics expand...