search for: iaddroff

Displaying 6 results from an estimated 6 matches for "iaddroff".

2013 Apr 07
1
[LLVMdev] Pat operands matching example in ppc
...is passed from the Pat. > My confusion is how operands of STWU from "Pat pre_store" get matched with those of memri. It is defined with operand types as: let MIOperandInfo = (ops dispRI:$imm, ptr_rc_nor0:$reg); while Pat is defined as: def : Pat<(pre_store i32:$rS, iPTR:$ptrreg, iaddroff:$ptroff), (STWU $rS, iaddroff:$ptroff, $ptrreg)>; So now how iPTR:$ptrreg and iaddroff:$ptroff get matched with ptr_rc_nor0:$reg and dispRI:$imm respectively? I mean the types are not exactly matching. Probably something is amiss in my understanding. -Anitha > > On 07/04/...
2013 Apr 07
2
[LLVMdev] Pat operands matching example in ppc
Hi, How do "Pat" operands get matched? I am trying to follow the example given in http://llvm.org/docs/CodeGenerator.html#selectiondag-process In the latest trunk of ppcintrinfo.td following pattern is defined: def : Pat<(pre_store i32:$rS, iPTR:$ptrreg, iaddroff:$ptroff), (STWU $rS, iaddroff:$ptroff, $ptrreg)>; I understand that input operand list i.e. ins of stwu should get matched with the given pre_store. But I am confused as to how "ptroff" and "ptrreg" get matched with "memri" used in STWU? For refere...
2013 Apr 07
0
[LLVMdev] Pat operands matching example in ppc
...rands get matched? I am trying to follow the example > given in http://llvm.org/docs/CodeGenerator.html#selectiondag-process > > In the latest trunk of ppcintrinfo.td <http://ppcintrinfo.td> > following pattern is defined: > > def : Pat<(pre_store i32:$rS, iPTR:$ptrreg, iaddroff:$ptroff), > (STWU $rS, iaddroff:$ptroff, $ptrreg)>; > > I understand that input operand list i.e. ins of stwu should get > matched with the given pre_store. But I am confused as to how > "ptroff" and "ptrreg" get matched with "memri"...
2012 Sep 19
0
[LLVMdev] "Unknown node flavor ..." Was: Re: tablegen and ptr_rc: PointerLikeRegClass
...NoEncode<"$ea_result">; I now get an "Unknown node flavor used in pattern: ptr_rc_wrapper". I.e.: llvm[3]: Building PPC.td instruction information with tblgen STBU: (set ptr_rc_wrapper:<empty>:$ea_res, (ist:iPTR GPRC:i32:$rS, ptr_rc_wrapper:iPTR:$ptrreg, iaddroff:iPTR: $ptroff)<<P:Predicate_itruncstore>><<P:Predicate_pre_truncst>><<P:Predicate_pre_truncsti8>>) Included from /home/willschm/dev/llvm.gitmirror/llvm/lib/Target/PowerPC/PPC.td:68: /home/willschm/dev/llvm.gitmirror/llvm/lib/Target/PowerPC/PPCInstrInfo.td:825:1:...
2012 Sep 14
2
[LLVMdev] tablegen and ptr_rc: PointerLikeRegClass
Hi all, I've been poking at AsmParser support for powerpc64 (ppc64-elf-linux-abi) and have run into some behavior I don't understand with the ptr_rc references coming out of the PPC*.td files when generating the asm-matcher files. For instance : $ ./build/bin/llvm-tblgen llvm/lib/Target/PowerPC/PPC.td -I ~/llvm-head/llvm/include -I ~/llvm-head/llvm/lib/Target/PowerPC/ -gen-asm-matcher
2012 Nov 15
3
[LLVMdev] Tablegen and ptr_rc: PointerLikeRegClass
...lt">; > > > I now get an "Unknown node flavor used in pattern: ptr_rc_wrapper". > I.e.: > llvm[3]: Building PPC.td instruction information with tblgen > STBU: (set ptr_rc_wrapper:<empty>:$ea_res, (ist:iPTR GPRC:i32:$rS, > ptr_rc_wrapper:iPTR:$ptrreg, iaddroff:iPTR: > $ptroff)<<P:Predicate_itruncstore>><<P:Predicate_pre_truncst>><<P:Predicate_pre_truncsti8>>) > Included > from /home/willschm/dev/llvm.gitmirror/llvm/lib/Target/PowerPC/PPC.td:68: > /home/willschm/dev/llvm.gitmirror/llvm/lib/Target/PowerPC/PPC...