Displaying 2 results from an estimated 2 matches for "i_arg".
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2013 Dec 20
3
[LLVMdev] Switch instruction optimization
...have a high level code which would look like that in C++:
enum E { A, B, C };
E int2e(long i) {
switch(i) {
case 0: return A;
case 1: return B;
case 2: return C;
default: return A;
}
}
It is compiled to this IR with O3 optimization:
define i64 @int2e(i64 %i_arg) #0 {
entry:
switch i64 %i_arg, label %label_case1 [
i64 2, label %label_case3
i64 1, label %label_case2
]
label_case1: ; preds = %entry,
%label_case3, %label_case2
%merge = phi i64 [ %i_arg, %label_case2 ], [ %i_arg, %label_case3 ], [ 0,
%entry ]...
2013 Dec 20
0
[LLVMdev] Switch instruction optimization
...m E { A, B, C };
>
> E int2e(long i) {
> switch(i) {
> case 0: return A;
> case 1: return B;
> case 2: return C;
> default: return A;
> }
> }
>
> It is compiled to this IR with O3 optimization:
>
> define i64 @int2e(i64 %i_arg) #0 {
> entry:
> switch i64 %i_arg, label %label_case1 [
> i64 2, label %label_case3
> i64 1, label %label_case2
> ]
>
> label_case1: ; preds = %entry,
> %label_case3, %label_case2
> %merge = phi i64 [ %i_arg, %label_case2 ], [...