Displaying 2 results from an estimated 2 matches for "i32_signed_max".
2014 Dec 18
2
[LLVMdev] missing optimization for icmps in induction variables?
...n.sub.1
br i1 %check, label %loop, label %break
break:
ret i32 %civ.inc
exit:
ret i32 42
}
!0 = !{i32 0, i32 2147483647}
One way to prove "%cmp == true" in two steps
1. notice that since both on the backedge and entry, %civ is known to
be less than %len.sub.1, which not i32_signed_max. This means
%civ.inc is an "add nsw".
2. on both the entry and backedge, we know "%civ `slt` %len.sub.1".
This implies "(%civ nsw+ 1) `slt` (%len.sub.1 nsw+ 1)" ==>
"%civ.inc `slt` %len".
Currently neither of these happen (i.e. even if I ma...
2015 Jan 08
2
[LLVMdev] missing optimization for icmps in induction variables?
...;> ret i32 42
>> }
>>
>> !0 = !{i32 0, i32 2147483647}
>>
>>
>> One way to prove "%cmp == true" in two steps
>>
>> 1. notice that since both on the backedge and entry, %civ is known to
>> be less than %len.sub.1, which not i32_signed_max. This means
>> %civ.inc is an "add nsw".
>>
>> 2. on both the entry and backedge, we know "%civ `slt` %len.sub.1".
>> This implies "(%civ nsw+ 1) `slt` (%len.sub.1 nsw+ 1)" ==>
>> "%civ.inc `slt` %len".
>&...