search for: i256

Displaying 20 results from an estimated 57 matches for "i256".

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2018 Dec 16
2
LLC Version 3.8 : Unsupported library call operation for a mul instruction
...ary call operation! I tried to do some "delta debugging" and eventually locate the buggy line of the code. So as shown below, the following code cause llc (version 3.8.1) throws the "Unsupported library call operation" issue, but it works fine for llc version 3.9. %20 = call i256 @llvm.bswap.i256(i256 %msg.value) %21 = mul i256 %20, 190 I tried to tweak the buggy lines into the following code, and it can also pass the compilation: %20 = call i256 @llvm.bswap.i256(i256 %msg.value) %21 = add i256 %20, 190 This seems really wired to me.. Any idea on that? Thank you!...
2018 Dec 14
2
LLVM Error: Unsupported library call operation
Hello, I am on the hook to instrument a piece of legacy LLVM IR code, and then we are planning to feed to the SeaHorn framework for some model checking tasks. After the instrumentation, I tried to use llc (version 3.9) to compile the IR code, and it works fine. However, when I try to use llc (version 3.8.1, the default llvm version of SeaHorn) to compile the IR code, it shows the following
2016 Apr 14
2
ABI for i256 in MCJIT
Hi, I have a small JIT project based on MCJIT. The generated LLVM IR code uses the i256 type. Also, the jitted code has to call back the host application from time to time. E.g. it calls a function i256 @callback(i256). 1. Can the callback function be implemented on the host application side (C/C++) to match the ABI used for the call by MCJIT? Or maybe the i256 has be to be...
2013 Nov 15
2
[LLVMdev] Modular arithmetic processors
...In other words, the following function, b + c mod N, corresponds to only one instruction on my target machine, given the modulus N set by another instruction to an auxiliary register. # this should translate to one instruction like: r3 = add r1, r2 # n is extended to 257-bit for simplicity define i256 @add(i256 %b, i256 %c, i257 %n) { %1 = zext i256 %b to i257 %2 = zext i256 %c to i257 %3 = add i257 %2, %1 %4 = icmp uge i257 %3, %n %5 = select i1 %4, i257 %n, i257 0 %6 = sub i257 %3, %5 %7 = trunc i257 %6 to i256 ret i256 %7 } The ultimate goal is to use LLVM to optimize and emi...
2010 May 26
2
[LLVMdev] i256 for x86_64
Hello all I have a very simple handwritten .ll file that can be translated to native assembly on x86_64 when I use i128. But if I use i256 I get an error. see the file and the first line of the error below. Any help is appreciated! I played a little bit with target datalayout but it didn't help. Best Ehsan Input File: target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:6...
2013 Nov 18
1
[LLVMdev] Modular arithmetic processors
Thanks for your insightful suggestions. Yes, I am programming for a real device that does modular arithmetic (and only modular arithmetic). The modulus N is fixed during a single launch of a program. One way I could also come up with is to simply use add i256 %a, %b to represent a + b mod n, and let LLVM passes to reason about possible optimizations. However these are not semantically identical and it may produce a wrong result, though in a rather low possibility. Here is another issue I have been thinking these days. As far as I know, legalizing a DAG...
2010 May 26
0
[LLVMdev] i256 for x86_64
On May 25, 2010, at 5:16 PM, Ehsan Amiri wrote: > Hello all > > I have a very simple handwritten .ll file that can be translated to native assembly on x86_64 when I use i128. But if I use i256 I get an error. see the file and the first line of the error below. Any help is appreciated! I played a little bit with target datalayout but it didn't help. This works for me on mainline. Are you using an old version of llvm? -Chris > > Best > Ehsan > > Input File: >...
2013 Nov 15
0
[LLVMdev] Modular arithmetic processors
...g function, b + c mod N, corresponds to only > one instruction on my target machine, given the modulus N set by another > instruction to an auxiliary register. > > # this should translate to one instruction like: r3 = add r1, r2 > # n is extended to 257-bit for simplicity > define i256 @add(i256 %b, i256 %c, i257 %n) { > %1 = zext i256 %b to i257 > %2 = zext i256 %c to i257 > %3 = add i257 %2, %1 > %4 = icmp uge i257 %3, %n > %5 = select i1 %4, i257 %n, i257 0 > %6 = sub i257 %3, %5 > %7 = trunc i257 %6 to i256 > ret i256 %7 > } > &gt...
2012 Nov 14
2
[LLVMdev] Question about llvm.ctpop.*
...i64/i128 seems to be overkill, and i8, i16 are inconvenient. ----------------------------------- declare i8 @llvm.ctpop.i8(i8 <src>) declare i16 @llvm.ctpop.i16(i16 <src>) declare i32 @llvm.ctpop.i32(i32 <src>) declare i64 @llvm.ctpop.i64(i64 <src>) declare i256 @llvm.ctpop.i256(i256 <src>) declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32> <src>) ----------------------------------------------- Thanks Shuxin
2010 May 26
2
[LLVMdev] i256 for x86_64
...010 at 5:25 PM, Chris Lattner <clattner at apple.com> wrote: > > On May 25, 2010, at 5:16 PM, Ehsan Amiri wrote: > > > Hello all > > > > I have a very simple handwritten .ll file that can be translated to > native assembly on x86_64 when I use i128. But if I use i256 I get an error. > see the file and the first line of the error below. Any help is appreciated! > I played a little bit with target datalayout but it didn't help. > > This works for me on mainline. Are you using an old version of llvm? > > -Chris > > > > > >...
2008 Sep 08
2
[LLVMdev] Integer questions
On Sep 5, 2008, at 3:07 PM, Duncan Sands wrote: > The current maximum the code generators support is i256. If you try > to > use bigger integers it will work fine in the bitcode, but if you try > to do code generation the compiler will crash. FYI, there is one other issue here, PR2660. While codegen in general can handle types like i256, individual targets don't always have calling con...
2020 Apr 22
2
_ExtInt, LLVM integers and constant time
Hello everyone, After reading the nice blog post about _ExtInt, I was wondering whether operations on i128/i256 and more generally on integer types in LLVM are guaranteed to be constant time or not. For instance, for now, the x86 & aarch64 backend generate constant time code for additions on i256 integers (see https://godbolt.org/z/xMfkqz & https://godbolt.org/z/jbkSpe), but is there some guarantee...
2015 Oct 05
3
RFC: Pass for lowering "non-linear" arithmetics of illegal types
Hi LLVM, This is my idea I had some time ago, when I realized that LLVM did not support legalization of some arithmetic instructions like mul i256. I have implemented very simple and limited version of that in my project. Is it something LLVM users would appreciate? 1. The pass transforms IR and is meant to be run before CodeGen (after IR optimizations). 2. The pass replaces instructions mul, udiv, urem, sdiv, srem that are know...
2009 Nov 10
0
[LLVMdev] Proposal: intp type
...nversions are always explicity specified as either a trunc, a sext, > or a zext.  Since the size of intp is not known at IR generation time, > you can't know whether a conversion to/from intp truncates or extends. > Now that there are arbitrary-sized integers, couldn't you zext to i256 then trunc down again, and later let the folder simplify as appropriate?
2009 Nov 11
1
[LLVMdev] Proposal: intp type
...always explicity specified as either a trunc, a sext, > > or a zext.  Since the size of intp is not known at IR generation time, > > you can't know whether a conversion to/from intp truncates or extends. > > Now that there are arbitrary-sized integers, couldn't you zext to i256 > then trunc down again, and later let the folder simplify as > appropriate? This is not correct, because i256 occupies too much space in structures, etc. This question came up in the past, and I half-jokingly suggested "i0" as the interger type that can store a null-pointer, and...
2008 Sep 05
0
[LLVMdev] Integer questions
...ing like that > be in the realm of the language designer, although having it at LLVM > level would also make sense, after all, what best knows how to compile > something for speed on the target system other then the compiler > itself)? The current maximum the code generators support is i256. If you try to use bigger integers it will work fine in the bitcode, but if you try to do code generation the compiler will crash. > In just a quick guess, I would say that specifying an integer bit size > too large for the machine would cause a compile error, but the docs do > not hint...
2019 Mar 26
2
Implement LLVM Intrinsics in C/LLVM IR
...M div code <divsubmission at gmail.com> wrote: > >> Hello, >> >> I am basically working on a static analysis project on LLVM IR, and the >> problem is that I will need to simulate the execution of a few LLVM >> Intrinsic, such as llvm.bswap.i160, and llvm.ctlz.i256. >> >> I am wondering if there has been some already implemented sample code, >> regarding these intrinsics? Either C or LLVM IR. Thanks a lot! >> >> Best, >> > _______________________________________________ > LLVM Developers mailing list > llvm-dev at...
2008 Sep 08
0
[LLVMdev] Integer questions
On Mon, Sep 8, 2008 at 12:08 PM, Dan Gohman <gohman at apple.com> wrote: > FYI, there is one other issue here, PR2660. While codegen in > general can handle types like i256, individual targets don't always > have calling convention rules to cover them. For example, returning > an i128 on x86-32 or an i256 on x86-64 doesn't doesn't fit in the > registers designated for returning values on those targets. I am mostly just interested in x86 (32-bit a...
2013 Aug 11
1
[LLVMdev] [global-isel] Random comments on Proposal for a global instruction selector
...m86k, TriCore) would be modeled perfectly by the register bank labels in the proposal. >> >> Won’t that work for your case? > > It might work, although given that our fat pointers are not integers I'm not sure how you think we should represent them. We can represent them as i256, but that would be very misleading as they don't have the majority of integer operations defined on them, and we can't materialise a pointer from an integer, only from an existing pointer and an offset. We ideally want address operations to always be of the form base + offset, where the of...
2019 Mar 26
2
Implement LLVM Intrinsics in C/LLVM IR
Hello, I am basically working on a static analysis project on LLVM IR, and the problem is that I will need to simulate the execution of a few LLVM Intrinsic, such as llvm.bswap.i160, and llvm.ctlz.i256. I am wondering if there has been some already implemented sample code, regarding these intrinsics? Either C or LLVM IR. Thanks a lot! Best, -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190326/4c44252b/a...