search for: i187

Displaying 5 results from an estimated 5 matches for "i187".

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2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...n 1, !tbaa !0 %conv44 = zext i8 %tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191...
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...42, align 1, !tbaa !0 %conv44 = zext i8 %tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191 %shr...
2010 Sep 29
0
[LLVMdev] spilling & xmm register usage
...t %tmp15.i33.i) nounwind > %tmp17.i173.i = fmul float %call16.i172.i, 0x3FD9884540000000 > %tmp19.i175.i = fmul float %tmp17.i173.i, %tmp7.i163.i > %tmp29.i185.i = fmul float %tmp7.i163.i, 0x3FF548CDE0000000 > %tmp30.i186.i = fadd float %tmp29.i185.i, 0xBFFD23DD40000000 > %tmp31.i187.i = fmul float %tmp7.i163.i, %tmp30.i186.i > %tmp32.i188.i = fadd float %tmp31.i187.i, 0x3FFC80EF00000000 > %tmp33.i189.i = fmul float %tmp7.i163.i, %tmp32.i188.i > %tmp34.i190.i = fadd float %tmp33.i189.i, 0xBFD6D1F0E0000000 > %tmp35.i191.i = fmul float %tmp7.i163.i, %tmp34.i190.i...
2010 Sep 29
3
[LLVMdev] spilling & xmm register usage
Hello everybody, I have stumbled upon a test case (the attached module is a slightly reduced version) that shows extremely reduced performance on linux compared to windows when executed using LLVM's JIT. We narrowed the problem down to the actual code being generated, the source IR on both systems is the same. Try compiling the attached module: llc -O3 -filetype=asm -o BAD.s BAD.ll Under
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...nv3.i181.i = zext i16 %53 to i32 %shl.i182.i = shl nuw nsw i32 %conv3.i181.i, 1 %conv5.i183.i = zext i16 %bits.1.i180.i to i32 %and6.i184.i = lshr i32 %conv5.i183.i, 1 %and6.lobit.i185.i = and i32 %and6.i184.i, 1 %storemerge.in.i186.i = or i32 %and6.lobit.i185.i, %shl.i182.i %storemerge.i187.i = trunc i32 %storemerge.in.i186.i to i16 store i16 %storemerge.i187.i, i16* %x.addr.023.i173.i, align 2 %shl14.i188.i = shl nuw nsw i32 %conv5.i183.i, 1 %conv15.i189.i = trunc i32 %shl14.i188.i to i16 %incdec.ptr.i190.i = getelementptr inbounds i16* %x.addr.023.i173.i, i32 -1 %inc.i191....