search for: i00202

The driver behaves differently when I run it by specifying absolute path than when I run it with relative path. See example Relative: i00202 at ubuntu:/tmp$ mcc16 --save-temps -dry-run hello.c./clang-cc -I ./include -triple=pic16- -emit-llvm-bc hello.c -o hello.bc-pqDR1Y llvm-ld -link-as-library hello.bc-pqDR1Y -o tmp.bc-M1Rwip llc -march=pic16 -f tmp.bc-M1Rwip -o tmp.s-DcVczP gpasm -I ./inc tmp.s-DcVczP -o tmp.o mplink /k ./lkr /l ./...

> BTW, Chris's Makefile changes broke llvmc yesterday (r75379). I'm > working on a fix. Hi Mikhail, Did you get a chance to fix this. I still get errors while building examples. i00202 at ubuntu:~/projects/llvm/tools/llvmc/example/mcc16$ make make[1]: Entering directory `/home/i00202/projects/llvm/tools/llvmc/example/mcc16/plugins' make[2]: Entering directory `/home/i00202/projects/llvm/tools/llvmc/example/mcc16/plugins/PIC16Base' make[2]: Nothing to be done for `all'...

Hi Sanjiv, 2009/6/18 Sanjiv Gupta <sanjiv.gupta at microchip.com>: > Hi Mikhail, > Thanks for your wonderful help so far. I have few more questions to ask: > > How do I modify the driver to pick tools from where the driver itself > resides, rather than from the PATH? > Do I need to write some C++ code to customize such behaviors? Yes, this is what hooks are for.

Mikhail Glushenkov wrote: > Hi Sanjiv, > > 2009/6/29 Sanjiv Gupta <sanjiv.gupta at microchip.com>: > >> I want to retrieve the value of argv[0] (which was passed to main function >> of the driver) in PrependCustomizedPath. >> > > I've added a way to access argv[0] in hooks: > http://thread.gmane.org/gmane.comp.compilers.llvm.cvs/50789 >

Hi Sanjiv, 2009/6/30 Sanjiv Gupta <sanjiv.gupta at microchip.com>: > One more thing: > How to make --save-temps always on, so that users won't have to specify it > every time they invoke the driver? Either always run the driver via an alias, or edit lib/CompilerDriver/BuiltinOptions.cpp: cl::opt<SaveTempsEnum::Values> SaveTemps ("save-temps",

...dress of "main", and the "Main" of CompilerDriver is in a shared object here. - Sanjiv Sanjiv Gupta wrote: > The driver behaves differently when I run it by specifying absolute path > than when I run it with relative path. > See example > > Relative: > > i00202 at ubuntu:/tmp$ mcc16 --save-temps -dry-run hello.c./clang-cc -I > ./include -triple=pic16- -emit-llvm-bc hello.c -o hello.bc-pqDR1Y > llvm-ld -link-as-library hello.bc-pqDR1Y -o tmp.bc-M1Rwip > llc -march=pic16 -f tmp.bc-M1Rwip -o tmp.s-DcVczP > gpasm -I ./inc tmp.s-DcVczP -o tmp.o &...

Hi Mikhail, Thanks for your wonderful help so far. I have few more questions to ask: How do I modify the driver to pick tools from where the driver itself resides, rather than from the PATH? And how to make sure that we have same behavior on Windows as far as paths (/ Vs \) and picking up tools from the driver directory is concerned? Do I need to write some C++ code to customize such

...ex code for the number. The inline asm code is simply printed to the machine code .s file when assembly code is generated. Here are the problems: 1. clang-cc needs parentheses or else gives errors. So the actual syntax is module asm (" blah "); 2. clang-cc gives warnings like i00202 at ubuntu:/tmp$ cat test.c module asm ("hello"); module asm ("world"); int main (void) { } i00202 at ubuntu:/tmp$ clang-cc -emit-llvm test.c test.c:1:1: warning: type specifier missing, defaults to 'int' module asm ("hello"); ^ test.c:2:1: warning: type specif...

...we can use linear scan as work around for short term. > > Thanks for your help. > > Regards > Sachin > > > -----Original Message----- > > From: Lang Hames [mailto:lhames at gmail.com] > > Sent: Sunday, November 15, 2009 10:08 AM > > To: Sachin Punyani - I00202 > > Cc: llvmdev at cs.uiuc.edu > > Subject: Re: [LLVMdev] Crash in PBQP register allocator > > > > Hi Sachin, > > > > Confirmed: This is being caused by a subtle issue in the heuristic > > PBQP solver. Specifically: R1/R2 reductions as currently implemented...

Thanks Lang! I think we can use linear scan as work around for short term. Thanks for your help. Regards Sachin > -----Original Message----- > From: Lang Hames [mailto:lhames at gmail.com] > Sent: Sunday, November 15, 2009 10:08 AM > To: Sachin Punyani - I00202 > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Crash in PBQP register allocator > > Hi Sachin, > > Confirmed: This is being caused by a subtle issue in the heuristic > PBQP solver. Specifically: R1/R2 reductions as currently implemented > can, on rare occasions, lea...

...t term. > > > > Thanks for your help. > > > > Regards > > Sachin > > > > > -----Original Message----- > > > From: Lang Hames [mailto:lhames at gmail.com] > > > Sent: Sunday, November 15, 2009 10:08 AM > > > To: Sachin Punyani - I00202 > > > Cc: llvmdev at cs.uiuc.edu > > > Subject: Re: [LLVMdev] Crash in PBQP register allocator > > > > > > Hi Sachin, > > > > > > Confirmed: This is being caused by a subtle issue in the heuristic > > > PBQP solver. Specifically: R1/R2...

Hi Sachin, Confirmed: This is being caused by a subtle issue in the heuristic PBQP solver. Specifically: R1/R2 reductions as currently implemented can, on rare occasions, lead to the heuristic solver failing to find a finite cost solution, even though one exists. The infinite cost solution will always be in violation of some rule of register allocation (failing to handle an interference, or

...ks for your help. >> > >> > Regards >> > Sachin >> > >> > > -----Original Message----- >> > > From: Lang Hames [mailto:lhames at gmail.com] >> > > Sent: Sunday, November 15, 2009 10:08 AM >> > > To: Sachin Punyani - I00202 >> > > Cc: llvmdev at cs.uiuc.edu >> > > Subject: Re: [LLVMdev] Crash in PBQP register allocator >> > > >> > > Hi Sachin, >> > > >> > > Confirmed: This is being caused by a subtle issue in the heuristic >> > > PBQP...

Hi, > My target is an 8-bit target. Therefore while performing a shift (right > or left) on long (32 bits) it is legalized in 4 smaller units. After > performing the shift, this value should be stored at the same location. > So order of the stores does matter. But all 4 stores are parallel in the > code and do not have any control flow dependency between them. Therefore >

...ssembly -------------------------------------- ; ModuleID = 'first.bc' @a = global i8 0 ; <i8*> [#uses=1] define i8 @fun(...) { entry: %tmp = load i8* @a ; <i8> [#uses=1] ret i8 %tmp } -------------------------------------- -----Original Message----- From: Sachin Punyani - I00202 Sent: Monday, May 12, 2008 8:51 PM To: LLVM Developer Mailing List (llvmdev at cs.uiuc.edu) Subject: Integer promotion of return node operand Hi All, Please consider the following case Test case -- -------------------------------------- char a; void fun () { return a; } ---------------------...

Hi, For the case, please see the ".ll" file attached. Here I am doing a right shift on 32 bits by constant amount (specifically by 8). My target is an 8-bit target. Therefore while performing a shift (right or left) on long (32 bits) it is legalized in 4 smaller units. After performing the shift, this value should be stored at the same location. So order of the stores does

...;> Regards >>>> Sachin >>>> >>>> >>>>> -----Original Message----- >>>>> From: Lang Hames [mailto:lhames at gmail.com] >>>>> Sent: Sunday, November 15, 2009 10:08 AM >>>>> To: Sachin Punyani - I00202 >>>>> Cc: llvmdev at cs.uiuc.edu >>>>> Subject: Re: [LLVMdev] Crash in PBQP register allocator >>>>> >>>>> Hi Sachin, >>>>> >>>>> Confirmed: This is being caused by a subtle issue in the heuristic >>>...