search for: hwsq

Displaying 19 results from an estimated 19 matches for "hwsq".

2015 May 24
3
[PATCH v2 07/10] bios/ramcfg: Separate out RON pull value
Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c | 3 ++- drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.c | 6 ++++-- 4 files changed, 9 insertions(+), 3 deletions(-) diff --git
2015 May 22
11
Reclocking support for NVA0
Adds reclocking for NVA0, and a whole lot of work for other cards. Had these patches collecting dust for a little, but tested them with both my NVA0, and Martin's a while back. Success not guaranteed, but should be quite a leap forward. Happy reviewing and testing. Cheers, Roy
2015 Sep 29
10
All-round reclocking improvements
In bulletpoints: - Add some support for G94 and G96 reclocking. Has been tested on literally two cards, which is hardly adequate as "full coverage". On the other hand, the changes were small enough to make me confident this might work for others as well. - Fix NV50 wait for VBLANK when no monitor is plugged in. - Voltage related inprovements for GT21x. - Slightly improve Keplers
2015 Mar 12
1
[PATCH 1/2] pbus/hwsq: Support strided register writes
Signed-off-by: Roy Spliet <rspliet at eclipso.eu> --- drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h | 44 ++++++++++++++++++++++---- 1 file changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h b/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h index 3394a5e..ebf709c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h +++ b/drivers/gpu/drm/...
2014 May 18
1
[PATCH 1/2] fb: default NvMemExec to on, turning it off is used for debugging only
...4 deletions(-) diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c index ef91b6e..e5d12c2 100644 --- a/nvkm/subdev/fb/ramnv50.c +++ b/nvkm/subdev/fb/ramnv50.c @@ -211,7 +211,7 @@ nv50_ram_prog(struct nouveau_fb *pfb) struct nv50_ram *ram = (void *)pfb->ram; struct nv50_ramseq *hwsq = &ram->hwsq; - ram_exec(hwsq, nouveau_boolopt(device->cfgopt, "NvMemExec", false)); + ram_exec(hwsq, nouveau_boolopt(device->cfgopt, "NvMemExec", true)); return 0; } diff --git a/nvkm/subdev/fb/ramnva3.c b/nvkm/subdev/fb/ramnva3.c index 6eb97f1..8076fb1 1006...
2012 Aug 09
1
[PATCH] drm/nouveau/nv50: Reclock when memory was stolen
Here's a quick-but-I-guess-tidy-fix for faulty behaviour someone reported in NVAF. I'm just not sure if the check for nvaa/nvac should still be in nv50_pm_clocks_pre... I believe this is wrong as they can reclock perfectly well (except the non-existing memory). Anyone has a definite answer to that?
2016 Mar 02
0
Debugging second dvi output on quadro fx380 not working
...5 PFB+0xb00 <= 0x23000305 [0] 443.965354 MMIO32 R 0x100b28 0x00048521 PFB+0xb28 => 0x48521 [0] 443.965372 MMIO32 W 0x100b28 0x0000223a PFB+0xb28 <= 0x223a [0] 443.965390 MMIO32 W 0x100e04 0x80020d01 PFB+0xe04 <= 0x80020d01 [0] 443.965413 MMIO32 R 0x001098 0x21ca003c PBUS.DEBUG_6 => { HWSQ_ENABLE | HWSQ_OVERRIDE_MODE = READ_OVERRIDE | CLOCK_GATING_1588 | 0x21ca0004 } [0] 443.965431 MMIO32 W 0x001098 0x21ca0034 PBUS.DEBUG_6 <= { HWSQ_OVERRIDE_MODE = READ_OVERRIDE | CLOCK_GATING_1588 | 0x21ca0004 } [0] 443.965450 MMIO32 W 0x001304 0x00000000 PBUS.HWSQ.ENTRY_POINT <= { 0 = 0 | 1 =...
2012 Jan 21
4
[NOT for merge] Patches that reduce power usage on NV86
This is more or less simplified series of patches that bring power usage on my NV86 close to that of binary blob. Best regards, Maxim Levitsky
2017 Nov 02
0
[PATCH] drm/nouveau/bios: make const arrays hwsq_signature and edid_sig static
From: Colin Ian King <colin.king at canonical.com> Don't populate arrays hwsq_signature and edid_sig on the stack but instead make them static. Makes the object code smaller by over 190 bytes: Before: text data bss dec hex filename 35676 3312 64 39052 988c nouveau_bios.o After: text data bss dec hex filename 35319 347...
2013 Jul 27
40
[Bug 67382] New: [nouveau, nv50] linux 3.9.7-3.10.3: Xorg won't be available
https://bugs.freedesktop.org/show_bug.cgi?id=67382 Priority: medium Bug ID: 67382 Assignee: nouveau at lists.freedesktop.org Summary: [nouveau, nv50] linux 3.9.7-3.10.3: Xorg won't be available QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: Linux (All)
2011 Nov 23
0
nouveau git + v3.2-rc2 + NV18 Oops
...ies to load the nouveau module, it blows up. What's funny is that it *used* to work, but I re-downloaded all the sources and rebuilt, so something might have changed. The current kernel is 3.2.0-rc2-00097-g75b64de3, built from commit 75b64de35b70358b789bb8c8a3ec35b67734b725 "drm/nouveau/hwsq: remove some magic, give proper opcode names" I finally captured the kernel logs when loading the module, as follows: [ 955.834884] ACPI: PCI Interrupt Link [LNK5] enabled at IRQ 10 [ 955.834938] nouveau 0000:02:00.0: PCI INT A -> Link[LNK5] -> GSI 10 (level, low) -> IRQ 10 [ 955...
2013 Nov 16
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
....h b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.h new file mode 100644 index 0000000..619bfbd --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.h @@ -0,0 +1,22 @@ +#ifndef __NVKM_CLK_NVAA_H__ +#define __NVKM_CLK_NVAA_H__ + +#include <subdev/bus.h> +#include <subdev/bus/hwsq.h> +#include <subdev/clock.h> + +struct nvaa_clock_priv { + struct nouveau_clock base; + enum nv_clk_src csrc, ssrc, vsrc; + //u32 ctrl; + u32 cctrl, sctrl; + u32 ccoef, scoef; + u32 cpost, spost; + u32 vdiv; +}; + +int nvaa_clock_ctor(struct nouveau_object *, struct nouveau_object *, +...
2013 Nov 17
0
[PATCH] drm/nouveau/clk: Implement reclocking for NVAA/NVAC
....h b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.h new file mode 100644 index 0000000..ee7575f --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nvaa.h @@ -0,0 +1,21 @@ +#ifndef __NVKM_CLK_NVAA_H__ +#define __NVKM_CLK_NVAA_H__ + +#include <subdev/bus.h> +#include <subdev/bus/hwsq.h> +#include <subdev/clock.h> + +struct nvaa_clock_priv { + struct nouveau_clock base; + enum nv_clk_src csrc, ssrc, vsrc; + u32 cctrl, sctrl; + u32 ccoef, scoef; + u32 cpost, spost; + u32 vdiv; +}; + +int nvaa_clock_ctor(struct nouveau_object *, struct nouveau_object *, + struct no...
2019 Jun 20
2
[PATCH] drm/nouveau: fix bogus GPL-2 license header
.../subdev/bar/gf100.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/bar/priv.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/bios/priv.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/bus/priv.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.h | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/clk/pll.h...
2013 Nov 09
2
[PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC
Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to
2014 Mar 23
0
[PATCH] drm/nouveau: allow nv04/nv50/nvc0+ parts of the driver to be separated
...uveau-$(CONFIG_DRM_NOUVEAU_NVC0) += core/subdev/bar/nvc0.o nouveau-y += core/subdev/bios/base.o nouveau-y += core/subdev/bios/bit.o nouveau-y += core/subdev/bios/boost.o @@ -50,112 +51,121 @@ nouveau-y += core/subdev/bios/volt.o nouveau-y += core/subdev/bios/xpio.o nouveau-y += core/subdev/bus/hwsq.o nouveau-y += core/subdev/bus/nv04.o -nouveau-y += core/subdev/bus/nv31.o -nouveau-y += core/subdev/bus/nv50.o -nouveau-y += core/subdev/bus/nv94.o -nouveau-y += core/subdev/bus/nvc0.o +nouveau-$(CONFIG_DRM_NOUVEAU_NV04) += core/subdev/bus/nv31.o +nouveau-$(CONFIG_DRM_NOUVEAU_NV50) += core/subdev...
2014 Aug 16
3
[PATCH 1/3] bios/fan: add support for maxwell's fan management table
...ndex f5d7f7c..75aa5e3 100644 --- a/drm/Kbuild +++ b/drm/Kbuild @@ -52,6 +52,7 @@ nouveau-y += core/subdev/bios/vmap.o nouveau-y += core/subdev/bios/volt.o nouveau-y += core/subdev/bios/xpio.o nouveau-y += core/subdev/bios/P0260.o +nouveau-y += core/subdev/bios/fan.o nouveau-y += core/subdev/bus/hwsq.o nouveau-y += core/subdev/bus/nv04.o nouveau-y += core/subdev/bus/nv31.o diff --git a/drm/core/include/subdev/bios/fan.h b/drm/core/include/subdev/bios/fan.h new file mode 120000 index 0000000..b56c338 --- /dev/null +++ b/drm/core/include/subdev/bios/fan.h @@ -0,0 +1 @@ +../../../../../nvkm/incl...
2018 Sep 09
2
[Bug 107874] New: Incorrect SPDX-License-Identifier on various nouveau drm kernel source files?
...DX-License-Identifier: GPL-2.0 */ nvkm/subdev/bar/gf100.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/bar/nv50.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/bar/priv.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/bios/priv.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/bus/hwsq.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/bus/priv.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/clk/gt215.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/clk/nv50.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subdev/clk/pll.h:/* SPDX-License-Identifier: GPL-2.0 */ nvkm/subde...
2014 Aug 17
9
[PATCH 01/10] bios/fan: add support for maxwell's fan management table v2
...ndex f5d7f7c..75aa5e3 100644 --- a/drm/Kbuild +++ b/drm/Kbuild @@ -52,6 +52,7 @@ nouveau-y += core/subdev/bios/vmap.o nouveau-y += core/subdev/bios/volt.o nouveau-y += core/subdev/bios/xpio.o nouveau-y += core/subdev/bios/P0260.o +nouveau-y += core/subdev/bios/fan.o nouveau-y += core/subdev/bus/hwsq.o nouveau-y += core/subdev/bus/nv04.o nouveau-y += core/subdev/bus/nv31.o diff --git a/drm/core/include/subdev/bios/fan.h b/drm/core/include/subdev/bios/fan.h new file mode 120000 index 0000000..b56c338 --- /dev/null +++ b/drm/core/include/subdev/bios/fan.h @@ -0,0 +1 @@ +../../../../../nvkm/incl...