Displaying 3 results from an estimated 3 matches for "hw_node".
2016 Aug 26
0
[PATCH v8 05/18] dmaengine: st_fdma: Add STMicroelectronics FDMA engine driver support
...ma_alloc_chan_res(struct dma_chan *chan)
+{
+ struct st_fdma_chan *fchan = to_st_fdma_chan(chan);
+
+ /* Create the dma pool for descriptor allocation */
+ fchan->node_pool = dma_pool_create(dev_name(&chan->dev->device),
+ fchan->fdev->dev,
+ sizeof(struct st_fdma_hw_node),
+ __alignof__(struct st_fdma_hw_node),
+ 0);
+
+ if (!fchan->node_pool) {
+ dev_err(fchan->fdev->dev, "unable to allocate desc pool\n");
+ return -ENOMEM;
+ }
+
+ dev_dbg(fchan->fdev->dev, "alloc ch_id:%d type:%d\n",
+ fchan->vchan.chan.cha...
2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data can be moved from memory to memory or between
memory and paced latency critical real time targets.
After quite
2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice,
This patchset adds support for the Flexible Direct Memory Access (FDMA) core
found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU
with a dedicated firmware. It is a general purpose DMA controller supporting
16 independent channels and data can be moved from memory to memory or between
memory and paced latency critical real time targets.
After quite