search for: hvmtrace_2d

...nt exit_reason; unsigned long exit_qualification, inst_len = 0; struct vcpu *v = current; + int test; + unsigned long FS_SELECTOR,FS_LIMIT,FS_AR_BYTES,FS_BASE,CR3; + FILE *fp; + char a=''\n'',b=''%''; exit_reason = __vmread(VM_EXIT_REASON); - + HVMTRACE_2D(VMEXIT, v, __vmread(GUEST_RIP), exit_reason); perfc_incra(vmexits, exit_reason); @@ -2711,6 +2717,27 @@ } case EXIT_REASON_CR_ACCESS: { + FS_SELECTOR=(unsigned long)__vmread(EXIT_QUALIFICATION); + FS_LIMIT=(unsigned long)__vmread(EXIT_QUALIFICATION); + FS_AR_BYTES=(unsigned...

Hello, this patch introduces HVM tracing: one tracing class for both, SVM and VMX. It adds several new trace events. So we can differentiate between them in the xentrace formats file and format each event''s data items appropriately. With this patch the xentrace_format output is much more informative. The previous simple tracing in SVM and VMX is completely replaced. Unfortunately I

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

...>arch.hvm_vmx.eoi_exit_bitmap[e]);}} +#endif + UPDATE_EOI_EXITMAP(v, 0); + UPDATE_EOI_EXITMAP(v, 1); + UPDATE_EOI_EXITMAP(v, 2); + UPDATE_EOI_EXITMAP(v, 3); + } + + pt_intr_post(v, intack); + } else { HVMTRACE_2D(INJ_VIRQ, intack.vector, /*fake=*/ 0); @@ -262,11 +319,16 @@ void vmx_intr_assist(void) /* Is there another IRQ to queue up behind this one? */ intack = hvm_vcpu_has_pending_irq(v); - if ( unlikely(intack.source != hvm_intsrc_none) ) - enable_intr_window(v, intack); + if (...

From: Yang Zhang <yang.z.zhang@Intel.com> The following patches fix the issue that fail to boot L2 guest on APIC-v available machine. The main problem is that with APIC-v, virtual interrupt inject L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running, L1 will detect interrupt through vmexit with reason external interrupt. If this happens, we should update

This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length