search for: hvm_svm

Displaying 11 results from an estimated 11 matches for "hvm_svm".

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2010 Aug 05
6
[PATCH 10/14] Nested Virtualization: svm specific implementation
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list
2011 Jan 31
9
[PATCH][SVM] Fix 32bit Windows guest VMs save/restore
The attached patch fixes the save/restore issue seen with 32bit Windows guest VMs. The root cause is that current Xen doesn''t intercept SYSENTER-related MSRs for 32bit guest VMs. As a result, the guest_sysenter_xxx fields contain incorrect values and shouldn''t be used for save/restore. This patch checks the LMA bit of EFER register in the save/restore code path. Please apply it
2010 Dec 15
5
[PATCH] svm: support VMCB cleanbits
Hi, Attached patch implements the VMCB cleanbits SVM feature. Upcoming AMD CPUs introduce them and they are basically hints for the CPU which vmcb values can be re-used from the previous VMRUN instruction. Each bit represents a certain set of fields in the VMCB. Setting a bit tells the cpu it can re-use the cached value from the previous VMRUN. Clearing a bit tells the cpu to reload the values
2012 Sep 11
0
[PATCH 1/3] x86/hvm: don't use indirect calls without need
...hvm_update_guest_cr(v, 0); - hvm_update_guest_cr(v, 2); - hvm_update_guest_cr(v, 4); + svm_update_guest_cr(v, 0); + svm_update_guest_cr(v, 2); + svm_update_guest_cr(v, 4); /* Load sysenter MSRs into both VMCB save area and VCPU fields. */ vmcb->sysenter_cs = v->arch.hvm_svm.guest_sysenter_cs = c->sysenter_cs; @@ -330,7 +332,7 @@ static void svm_load_cpu_state(struct vc vmcb->cstar = data->msr_cstar; vmcb->sfmask = data->msr_syscall_mask; v->arch.hvm_vcpu.guest_efer = data->msr_efer; - hvm_update_guest_efer(v); + svm_u...
2011 Jan 11
1
[RFC PATCH 2/2] ASID: Flush by ASID
This patch implements flush by asid feature for AMD CPUs. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd
2008 Jun 24
3
Question related to Single-step execution and Emulation
Hi all, I am trying to perform single-stepping and instruction emulation both in Xen-3.2.1. I am using the following approach: First, I mark a guest page "not present" inside the shadow page table so that I could intercept any operation that involves this page. When the guest tries to access that page, it faults and control goes to Xen (sh_page_fault function). There, I emulate that
2012 May 24
11
[PATCH 0/3] XEN: fix vmx exception mistake
This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length
2011 Feb 07
0
[xen-unstable test] 5665: regressions - FAIL
...22873:186162762071 user: Keir Fraser <keir@xen.org> date: Sun Feb 06 17:03:09 2011 +0000 hvm amd: Fix 32bit guest VM save/restore issues associated with SYSENTER MSRs This patch turn-on SYSENTER MSRs interception for 32bit guest VMs on AMD CPUs. With it, hvm_svm.guest_sysenter_xx fields always contain the canonical version of SYSENTER MSRs and are used in guest save/restore. The data fields in VMCB save area are updated as necessary. Reported-by: James Harper <james.harper@bendigoit.com.au> Signed-off-by: Wei Huang <wei.huang2...
2012 May 30
12
[PATCH v2 0/4] XEN: fix vmx exception mistake
Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.
2007 Mar 28
2
[PATCH 2/3] User-space grant table device - main driver
A character device for accessing (in user-space) pages that have been granted by other domains. Signed-off-by: Derek Murray <Derek.Murray@cl.cam.ac.uk> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel