search for: hvm_register_save_restor

...if ( hvm_load_entry(VIRIDIAN, h, &ctxt) != 0 ) + if ( hvm_load_entry(VIRIDIAN_DOMAIN, h, &ctxt) != 0 ) return -EINVAL; d->arch.hvm_domain.viridian.hypercall_gpa.raw = ctxt.hypercall_gpa; @@ -413,5 +413,48 @@ static int viridian_load_cpu_ctxt(struct return 0; } -HVM_REGISTER_SAVE_RESTORE(VIRIDIAN, viridian_save_cpu_ctxt, - viridian_load_cpu_ctxt, 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(VIRIDIAN_DOMAIN, viridian_save_domain_ctxt, + viridian_load_domain_ctxt, 1, HVMSR_PER_DOM); + +static int viridian_save_vcpu_ctxt(struct domai...

...->arch.lr_mask = ctxt.lr_mask; >> + v->arch.event_mask = ctxt.event_mask; >> + >> + /* Restore PPI states */ >> + vgic_irq_rank_restore(&v->arch.vgic.private_irqs, &ctxt.ppi_state); >> + >> + return 0; >> +} >> + >> +HVM_REGISTER_SAVE_RESTORE(GIC, gic_save, gic_load, 1, HVMSR_PER_VCPU); >> + >> +static int timer_save(struct domain *d, hvm_domain_context_t *h) >> +{ >> + struct hvm_hw_timer ctxt; >> + struct vcpu *v; >> + struct vtimer *t; >> + int i; >> + >> + /* Save...

...lgorithm to manage the states on context switch. At present, we know 3 bits in the XFEATURE_ENABLED_MASK: FPU, SSE and YMM. YMM is defined in Intel AVX Programming Reference: http://software.intel.com/sites/avx/ One more patch to support hvm guest''s save/restore by defining a pair of new HVM_REGISTER_SAVE_RESTORE save/load handlers will be posted later. Thanks, -- Dexuan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

Xen/MCE: vMCE injection In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs). This patch fix vMCE injection bug, injecting vMCE# to all vcpus. Signed-off-by: Liu,