Displaying 4 results from an estimated 4 matches for "hvm_pae_enabled".
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
...vmentry_ctl &= ~VM_ENTRY_LOAD_GUEST_PAT;
diff -r c61a5ba8c972 xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 22 02:47:51 2011 +0800
+++ b/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 22 16:15:19 2011 +0800
@@ -1004,7 +1004,7 @@ static void vmx_load_pdptrs(struct vcpu
if ( !hvm_pae_enabled(v) || (v->arch.hvm_vcpu.guest_efer & EFER_LMA) )
return;
- if ( cr3 & 0x1fUL )
+ if ( (cr3 & 0x1fUL) && !hvm_pcid_enabled(v) )
goto crash;
mfn = mfn_x(gfn_to_mfn(v->domain, cr3 >> PAGE_SHIFT, &p2mt));
@@ -2661,6 +2661,7 @@ asmlink...
2011 Sep 23
2
Some problems about xenpaging
...39;s better than making the xen crash
void vmx_load_pdptrs(struct vcpu *v)
{
unsigned long cr3 = v->arch.hvm_vcpu.guest_cr[3], mfn;
uint64_t *guest_pdptrs;
p2m_type_t p2mt;
char *p;
unsigned int try_count = 0;
/* EPT needs to load PDPTRS into VMCS for PAE. */
if ( !hvm_pae_enabled(v) || (v->arch.hvm_vcpu.guest_efer & EFER_LMA) )
return;
if ( cr3 & 0x1fUL )
goto crash;
mfn = mfn_x(gfn_to_mfn(v->domain, cr3 >> PAGE_SHIFT, &p2mt));
if ( !p2m_is_ram(p2mt) )
goto crash;
+ if( p2m_is_paging(p2mt))
+ {
+ p2m_mem_p...
2013 Jan 21
6
[PATCH v3 0/4] nested vmx: enable VMCS shadowing feature
Changes from v2 to v3:
- Use pfn_to_paddr() to get the address from frame number instead of doing shift directly.
- Remove some unnecessary initialization code and add "static" to vmentry_fields and gpdptr_fields.
- Enable the VMREAD/VMWRITE bitmap only if nested hvm is enabled.
- Use clear_page() to set all 0 to the page instead of memset().
- Use domheap to allocate the
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com>
With virtual EPT support, L1 hyerpvisor can use EPT hardware
for L2 guest''s memory virtualization. In this way, L2 guest''s
performance can be improved sharply. According to our testing,
some benchmarks can show > 5x performance gain.
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
Zhang Xiantao (11):