search for: hvm_flush_guest_tlb

...entries will just not be used. However, I don''t understand the use of hvm_asid_flush_core which it appears will cause all HVM vcpu''s to get new vpid/asid, hence, discard all previously used VPID tagged TLBs. In particular, consider a PV guest: write_ptbase -> write_cr3 -> hvm_flush_guest_tlbs -> hvm_asid_flush_core(). Since the PV guest is only using VPID 0 tagged TLBs, why do we need to flush all TLBs for all HVM guests? thanks Mukesh

Future AMD SVM supports a new feature called flush by ASID. The idea is to allow CPU to flush TLBs associated with the ASID assigned to guest VM. So hypervisor doesn''t have to reassign a new ASID in order to flush guest''s VCPU. Please review it. Thanks, Wei Signed-off-by: Wei Huang <wei.huang2@amd.com> Signed-off-by: Wei Wang <wei.wang2@amd.com> -- Advanced Micro