search for: hvm_domain

Displaying 20 results from an estimated 34 matches for "hvm_domain".

2013 Aug 16
7
[PATCH v2] xen/console: buffer and show origin of guest PV writes
.../xen/arch/x86/hvm/hvm.c index 1fcaed0..4ff76cc 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -485,8 +485,7 @@ static int hvm_set_ioreq_page( static int hvm_print_line( int dir, uint32_t port, uint32_t bytes, uint32_t *val) { - struct vcpu *curr = current; - struct hvm_domain *hd = &curr->domain->arch.hvm_domain; + struct domain *cd = current->domain; char c = *val; BUG_ON(bytes != 1); @@ -495,17 +494,16 @@ static int hvm_print_line( if ( !isprint(c) && (c != ''\n'') && (c != ''\t'') )...
2013 Sep 09
0
[PATCH v3] xen/console: buffer and show origin of guest PV writes
.../xen/arch/x86/hvm/hvm.c index ebf1838..8fd218e 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -485,8 +485,7 @@ static int hvm_set_ioreq_page( static int hvm_print_line( int dir, uint32_t port, uint32_t bytes, uint32_t *val) { - struct vcpu *curr = current; - struct hvm_domain *hd = &curr->domain->arch.hvm_domain; + struct domain *cd = current->domain; char c = *val; BUG_ON(bytes != 1); @@ -495,17 +494,16 @@ static int hvm_print_line( if ( !isprint(c) && (c != ''\n'') && (c != ''\t'') )...
2012 Sep 07
2
[PATCH] x86/hvm: don't give vector callback higher priority than NMI/MCE
Those two should always be delivered first imo. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -395,16 +395,16 @@ struct hvm_intack hvm_vcpu_has_pending_i struct hvm_domain *plat = &v->domain->arch.hvm_domain; int vector; - if ( (plat->irq.callback_via_type == HVMIRQ_callback_vector) - && vcpu_info(v, evtchn_upcall_pending) ) - return hvm_intack_vector(plat->irq.callback_via.vector); - if ( unlikely(v->nmi_pendi...
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):
2012 Nov 29
4
[PATCH] x86/hap: fix race condition between ENABLE_LOGDIRTY and track_dirty_vram hypercall
.....) ---> (B) -> paging_log_dirty_enable() ======================================================================== [case-2] XEN_DOMCTL_SHADOW_OP_ENABLE_LOGDIRTY hypercall -> paging_enable_logdirty() -> hap_logdirty_init() -> paging_log_dirty_disable() /* d->arch.hvm_domain.dirty_vram != NULL */ d->arch.paging.mode &= ~PG_log_dirty; ---> (C) /* d->arch.hvm_domain.dirty_vram is freed */ dereference dirty_vram // access to freed memory !!! <--- (D) HVMOP_track_dirty_vram -> hap_track_dirty_vram() /* (!paging_mode_log_dirty(...
2013 Feb 05
21
[PATCH] x86/hvm: fix corrupt ACPI PM-Timer during live migration
The value of ACPI PM-Timer may be broken on save unless the timer mode is delay_for_missed_ticks. With other timer modes, vcpu->arch.hvm_vcpu.guest_time is always zero and the adjustment from its value is wrong. This patch fixes the saved value of ACPI PM-Timer: - don''t adjust the PM-Timer if vcpu->arch.hvm_vcpu.guest_time is zero. - consolidate calculations of PM-Timer to one
2011 Sep 23
1
[PATCH] Add save/restore support for viridian APIC assist pfn
...re do just enough to keep windows + * happy. * * See http://msdn.microsoft.com/en-us/library/ff538657%28VS.85%29.aspx for * details of how Windows uses the page. @@ -387,9 +387,9 @@ out: return HVM_HCALL_completed; } -static int viridian_save_cpu_ctxt(struct domain *d, hvm_domain_context_t *h) +static int viridian_save_domain_ctxt(struct domain *d, hvm_domain_context_t *h) { - struct hvm_viridian_context ctxt; + struct hvm_viridian_domain_context ctxt; if ( !is_viridian_domain(d) ) return 0; @@ -397,14 +397,14 @@ static int viridian_save_cpu_ctxt(stru...
2013 Nov 20
2
[PATCH] hvm: reset TSC to 0 after domain resume from S3
.../hvm.c b/xen/arch/x86/hvm/hvm.c index 3b353ec..3d48978 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3736,8 +3736,13 @@ static void hvm_s3_suspend(struct domain *d) static void hvm_s3_resume(struct domain *d) { + struct vcpu *v; if ( test_and_clear_bool(d->arch.hvm_domain.is_s3_suspended) ) + { + for_each_vcpu( d, v ) + hvm_set_guest_tsc( v, 0 ); domain_unpause(d); + } } static int hvmop_set_isa_irq_level( -- 1.8.4.rc3
2013 Nov 26
6
[PATCH v5] x86: properly handle MSI-X unmask operation from guests
..._entry, &entry->table_flags) ) + { + v->arch.pending_msix_unmask.ctrl_address = address; goto out; + } virt = msixtbl_addr_to_virt(entry, address); if ( !virt ) @@ -528,3 +531,15 @@ void msixtbl_pt_cleanup(struct domain *d) spin_unlock(&d->arch.hvm_domain.msixtbl_list_lock); local_irq_restore(flags); } + +bool_t msix_post_handler(struct vcpu *v) +{ + unsigned long ctrl_address = v->arch.pending_msix_unmask.ctrl_address; + + if ( ctrl_address == 0 ) + return 1; + + v->arch.pending_msix_unmask.ctrl_address = 0; + return...
2010 Mar 02
2
[PATCH][XEN] p2m cleanup: remove unused function
Hi! Attached patch removes gfn_to_mfn_current(). It is redundant and effectively unused. All remaining users now use proper replacement function. => No functional change. While here, silence stdvga and use page_mode_hap() consequently. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH
2007 Aug 09
0
[PATCH] x86/hvm: miscellaneous CPUID handling changes
...clear_bit(X86_FEATURE_MWAIT & 31, ecx); if ( vlapic_hw_disabled(vcpu_vlapic(v)) ) - clear_bit(X86_FEATURE_APIC & 31, edx); + __clear_bit(X86_FEATURE_APIC & 31, edx); #if CONFIG_PAGING_LEVELS >= 3 if ( !v->domain->arch.hvm_domain.params[HVM_PARAM_PAE_ENABLED] ) #endif - clear_bit(X86_FEATURE_PAE & 31, edx); - clear_bit(X86_FEATURE_PSE36 & 31, edx); - } - else if ( input == 0x80000001 ) - { + __clear_bit(X86_FEATURE_PAE & 31, edx); + __clea...
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.
2013 Feb 21
2
[PATCH v3] x86/nhvm: properly clean up after failure to set up all vCPU-s
...s required by 26486:7648ef657fe7 and 26489:83a3fa9c8434. --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3918,18 +3918,20 @@ long do_hvm_op(unsigned long op, XEN_GUE } if ( a.value > 1 ) rc = -EINVAL; - if ( !is_hvm_domain(d) ) - rc = -EINVAL; /* Remove the check below once we have * shadow-on-shadow. */ if ( cpu_has_svm && !paging_mode_hap(d) && a.value ) rc = -EINVAL; /* Set...
2013 Jul 03
6
revert commit e4fd0475 ("hvmloader: always include HPET table")
Windows SVVP tests requiring a HPET ACPI table is in my opinion not a valid reason to always expose that table - respective tests should be run with "hpet=1" in the guest config file. The problem here is that at least with qemu-traditional, which by default doesn''t appear to emulate a HPET, the advertising here can mislead an OS to believe that there actually is a usable HPET,
2008 Dec 29
13
BSOD "A clock interrupt was not recevied ona secondary processor within the allocated time interval"
Hi, When dom0 is under heavy load any Vista or Windows 2008 HVM''s that are running and have multiple cpu''s assigned often BSOD with code 0x00000101 "A clock interrupt was not recevied ona secondary processor within the allocated time interval" It only happens if the load in dom0 is high enough to make the mouse pointer lagged, once the mouse fails to track in
2008 Dec 29
13
BSOD "A clock interrupt was not recevied ona secondary processor within the allocated time interval"
Hi, When dom0 is under heavy load any Vista or Windows 2008 HVM''s that are running and have multiple cpu''s assigned often BSOD with code 0x00000101 "A clock interrupt was not recevied ona secondary processor within the allocated time interval" It only happens if the load in dom0 is high enough to make the mouse pointer lagged, once the mouse fails to track in
2012 May 23
17
[PATCH] bug-fixes to hvc-xen driver in v3.4 (and earlier).
Three of the patches could be squashed in one, but it makes more sense to review them as three. These patches fix the case of an PVHVM guest not being able to resume propely b/c of hitting: 142 BUG_ON(info->type != IRQT_UNBOUND && info->type != type); (in events.c) and also adds a WARN to catch situations like these. The reason for this is that the Xen python toolstack
2012 Aug 23
2
[PATCH] nvmx: fix resource relinquish for nested VMX
...m-x86/hvm/hvm.h | 1 + xen/include/asm-x86/hvm/vmx/vvmx.h | 1 + 5 files changed, 18 insertions(+), 1 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 7f8a025..0576a24 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -561,6 +561,9 @@ int hvm_domain_initialise(struct domain *d) void hvm_domain_relinquish_resources(struct domain *d) { + if ( hvm_funcs.nhvm_domain_relinquish_resources ) + hvm_funcs.nhvm_domain_relinquish_resources(d); + hvm_destroy_ioreq_page(d, &d->arch.hvm_domain.ioreq); hvm_destroy_ioreq_page(d,...
2013 Nov 22
10
[PATCH v4] x86: properly handle MSI-X unmask operation from guests
...v->arch.pending_msix_unmask.valid = 1; + v->arch.pending_msix_unmask.ctrl_address = address; goto out; + } virt = msixtbl_addr_to_virt(entry, address); if ( !virt ) @@ -528,3 +532,17 @@ void msixtbl_pt_cleanup(struct domain *d) spin_unlock(&d->arch.hvm_domain.msixtbl_list_lock); local_irq_restore(flags); } + +int msix_post_handler(struct vcpu *v) +{ + int rc; + + if ( v->arch.pending_msix_unmask.valid == 0 ) + return 0; + + v->arch.pending_msix_unmask.valid = 0; + + rc = msixtbl_write(v, v->arch.pending_msix_unmask.ctrl...
2011 Mar 25
2
[RFC PATCH 2/3] AMD IOMMU: Implement p2m sharing
-- Advanced Micro Devices GmbH Sitz: Dornach, Gemeinde Aschheim, Landkreis München Registergericht München, HRB Nr. 43632 WEEE-Reg-Nr: DE 12919551 Geschäftsführer: Alberto Bozzo, Andrew Bowd _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel