Displaying 19 results from an estimated 19 matches for "hv_x64_msr_scontrol".
2015 Oct 26
3
[kvm-unit-tests PATCH] x86: hyperv_synic: Hyper-V SynIC test
.../msr.h b/lib/x86/msr.h
index 281255a..54da420 100644
--- a/lib/x86/msr.h
+++ b/lib/x86/msr.h
@@ -408,4 +408,27 @@
#define MSR_VM_IGNNE 0xc0010115
#define MSR_VM_HSAVE_PA 0xc0010117
+/* Define synthetic interrupt controller model specific registers. */
+#define HV_X64_MSR_SCONTROL 0x40000080
+#define HV_X64_MSR_SVERSION 0x40000081
+#define HV_X64_MSR_SIEFP 0x40000082
+#define HV_X64_MSR_SIMP 0x40000083
+#define HV_X64_MSR_EOM 0x40000084
+#define HV_X64_MSR_SINT0...
2015 Oct 26
3
[kvm-unit-tests PATCH] x86: hyperv_synic: Hyper-V SynIC test
.../msr.h b/lib/x86/msr.h
index 281255a..54da420 100644
--- a/lib/x86/msr.h
+++ b/lib/x86/msr.h
@@ -408,4 +408,27 @@
#define MSR_VM_IGNNE 0xc0010115
#define MSR_VM_HSAVE_PA 0xc0010117
+/* Define synthetic interrupt controller model specific registers. */
+#define HV_X64_MSR_SCONTROL 0x40000080
+#define HV_X64_MSR_SVERSION 0x40000081
+#define HV_X64_MSR_SIEFP 0x40000082
+#define HV_X64_MSR_SIMP 0x40000083
+#define HV_X64_MSR_EOM 0x40000084
+#define HV_X64_MSR_SINT0...
2015 Nov 02
0
[kvm-unit-tests PATCH] x86: hyperv_synic: Hyper-V SynIC test
...da420 100644
> --- a/lib/x86/msr.h
> +++ b/lib/x86/msr.h
> @@ -408,4 +408,27 @@
> #define MSR_VM_IGNNE 0xc0010115
> #define MSR_VM_HSAVE_PA 0xc0010117
>
> +/* Define synthetic interrupt controller model specific registers. */
> +#define HV_X64_MSR_SCONTROL 0x40000080
> +#define HV_X64_MSR_SVERSION 0x40000081
> +#define HV_X64_MSR_SIEFP 0x40000082
> +#define HV_X64_MSR_SIMP 0x40000083
> +#define HV_X64_MSR_EOM 0x40000084
> +#d...
2015 Oct 09
0
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...a);
+ return 0;
+}
+
+static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
+ u32 msr, u64 data, bool host)
+{
+ struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
+ int ret;
+
+ vcpu_debug(vcpu, "set msr 0x%x 0x%llx host %d\n",
+ msr, data, host);
+ ret = 0;
+ switch (msr) {
+ case HV_X64_MSR_SCONTROL:
+ synic->control = data;
+ break;
+ case HV_X64_MSR_SVERSION:
+ if (!host) {
+ ret = 1;
+ break;
+ }
+ synic->version = data;
+ break;
+ case HV_X64_MSR_SIEFP:
+ if (data & HV_SYNIC_SIEFP_ENABLE)
+ if (kvm_clear_guest(vcpu->kvm,
+ data & PAGE_MASK, PAGE_SIZE))...
2015 Oct 26
9
[PATCH 0/7] Hyper-V Synthetic interrupt controller
Hyper-V SynIC (synthetic interrupt controller) device
implementation.
The implementation contains:
* msr's support
* irq routing setup
* irq injection
* irq ack callback registration
* event/message pages changes tracking at Hyper-V exit
* Hyper-V test device to test SynIC by kvm-unit-tests
Andrey Smetanin (7):
standard-headers/x86: add Hyper-V SynIC constants
target-i386/kvm: Hyper-V
2015 Oct 26
9
[PATCH 0/7] Hyper-V Synthetic interrupt controller
Hyper-V SynIC (synthetic interrupt controller) device
implementation.
The implementation contains:
* msr's support
* irq routing setup
* irq injection
* irq ack callback registration
* event/message pages changes tracking at Hyper-V exit
* Hyper-V test device to test SynIC by kvm-unit-tests
Andrey Smetanin (7):
standard-headers/x86: add Hyper-V SynIC constants
target-i386/kvm: Hyper-V
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (synic) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
Synic is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (synic) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
Synic is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (SynIC) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
SynIC is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 16
10
[PATCH v2 0/9] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt
controller (SynIC) which is a building block of the Hyper-V
paravirtualized device bus (vmbus).
SynIC is a lapic extension, which is controlled via MSRs and maintains
for each vCPU
- 16 synthetic interrupt "lines" (SINT's); each can be configured to
trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 12
0
[Qemu-devel] [PATCH 2/2] kvm/x86: Hyper-V kvm exit
...ed? Hmm, I see it throughout the patch, so it
> looks intentional, but I keep trying to read it as a typo for 'sync'.
>
this is not a typo :)
this is an abbreviation for synthetic interrupt controller,
pls compare with this
./arch/x86/include/uapi/asm/hyperv.h: * Basic SynIC MSRs
(HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM
Though there is some sense in the question itself. I think
that it would be better to keep naming it SynIC as
in the original kernel code.
Den
2015 Oct 09
0
[PATCH 2/2] kvm/x86: Hyper-V kvm exit
...pu->exit.u.synic.msg_page = synic->msg_page;
+
+ kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
+}
+
static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
u32 msr, u64 data, bool host)
{
@@ -103,6 +117,7 @@ static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
switch (msr) {
case HV_X64_MSR_SCONTROL:
synic->control = data;
+ synic_exit(synic, msr);
break;
case HV_X64_MSR_SVERSION:
if (!host) {
@@ -119,6 +134,7 @@ static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
break;
}
synic->evt_page = data;
+ synic_exit(synic, msr);
break;
case HV_X64_MSR_SIMP:...
2015 Oct 16
0
[PATCH 9/9] kvm/x86: Hyper-V kvm exit
...pu->exit.u.synic.msg_page = synic->msg_page;
+
+ kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
+}
+
static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
u32 msr, u64 data, bool host)
{
@@ -141,6 +155,7 @@ static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
switch (msr) {
case HV_X64_MSR_SCONTROL:
synic->control = data;
+ synic_exit(synic, msr);
break;
case HV_X64_MSR_SVERSION:
if (!host) {
@@ -157,6 +172,7 @@ static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
break;
}
synic->evt_page = data;
+ synic_exit(synic, msr);
break;
case HV_X64_MSR_SIMP:...
2015 Oct 12
5
[Qemu-devel] [PATCH 2/2] kvm/x86: Hyper-V kvm exit
On 10/09/2015 07:39 AM, Denis V. Lunev wrote:
> From: Andrey Smetanin <asmetanin at virtuozzo.com>
>
> A new vcpu exit is introduced to notify the userspace of the
> changes in Hyper-V synic configuraion triggered by guest writing to the
s/configuraion/configuration/
Is 'synic' intended? Is it short for something (if so, spelling it out
may help)?
> +++
2015 Oct 12
5
[Qemu-devel] [PATCH 2/2] kvm/x86: Hyper-V kvm exit
On 10/09/2015 07:39 AM, Denis V. Lunev wrote:
> From: Andrey Smetanin <asmetanin at virtuozzo.com>
>
> A new vcpu exit is introduced to notify the userspace of the
> changes in Hyper-V synic configuraion triggered by guest writing to the
s/configuraion/configuration/
Is 'synic' intended? Is it short for something (if so, spelling it out
may help)?
> +++
2010 Nov 01
5
[PATCH 03/10] staging: hv: Convert camel cased struct fields in hv.h to lower cases
...gpa = virt_to_phys(gHvContext.synICEventPage[cpu])
+ siefp.base_siefp_gpa = virt_to_phys(g_hv_context.synic_event_page[cpu])
>> PAGE_SHIFT;
DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.as_uint64);
@@ -449,15 +454,15 @@ void HvSynicInit(void *irqarg)
wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
- gHvContext.SynICInitialized = true;
+ g_hv_context.synic_initialized = true;
return;
Cleanup:
- if (gHvContext.synICEventPage[cpu])
- osd_PageFree(gHvContext.synICEventPage[cpu], 1);
+ if (g_hv_context.synic_event_page[cpu])
+ osd_PageFree(g_hv_context.synic_event_page...
2010 Nov 01
5
[PATCH 03/10] staging: hv: Convert camel cased struct fields in hv.h to lower cases
...gpa = virt_to_phys(gHvContext.synICEventPage[cpu])
+ siefp.base_siefp_gpa = virt_to_phys(g_hv_context.synic_event_page[cpu])
>> PAGE_SHIFT;
DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.as_uint64);
@@ -449,15 +454,15 @@ void HvSynicInit(void *irqarg)
wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
- gHvContext.SynICInitialized = true;
+ g_hv_context.synic_initialized = true;
return;
Cleanup:
- if (gHvContext.synICEventPage[cpu])
- osd_PageFree(gHvContext.synICEventPage[cpu], 1);
+ if (g_hv_context.synic_event_page[cpu])
+ osd_PageFree(g_hv_context.synic_event_page...
2010 Nov 01
24
[PATCH 01/10] staging: hv: Convert camel cased struct fields in channel_mgmt.h to lower cases
From: Haiyang Zhang <haiyangz at microsoft.com>
Convert camel cased struct fields in channel_mgmt.h to lower cases
Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com>
Signed-off-by: Hank Janssen <hjanssen at microsoft.com>
---
drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------
drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------
2010 Nov 01
24
[PATCH 01/10] staging: hv: Convert camel cased struct fields in channel_mgmt.h to lower cases
From: Haiyang Zhang <haiyangz at microsoft.com>
Convert camel cased struct fields in channel_mgmt.h to lower cases
Signed-off-by: Haiyang Zhang <haiyangz at microsoft.com>
Signed-off-by: Hank Janssen <hjanssen at microsoft.com>
---
drivers/staging/hv/channel.c | 302 ++++++++++++++++++------------------
drivers/staging/hv/channel_mgmt.c | 186 ++++++++++++------------