Displaying 3 results from an estimated 3 matches for "hv7_".
2011 Jul 07
1
[LLVMdev] code generation removes duplicated instructions
...structions with HV in there name are extra inserted instructions and
relExit BB contains a printf message which is executed if the
comparison fails. This is the final code which is supposed to execute on a
simulator or real hardware.
bb7:
%46 = load i32* %j, align 4
%47 = add nsw i32 %46, 1
%HV7_ = add nsw i32 %46, 1
%HVCmp13 = icmp ne i32 %47, %HV7_
br i1 %HVCmp13, label %relExit, label %bb7.split
bb7.split:
store i32 %47, i32* %j, align 4
br label %bb8
The following is the arm code generated for the above block (llc with -O0):
.LBB0_26: @ %bb7...
2011 Jul 07
0
[LLVMdev] code generation removes duplicated instructions
On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote:
> I am trying to add a intrinsic call between the similar two instructions
> which either I'll remove or convert to nop in codegen.
If the two instructions are only similar in your real example, than
you need to make them similar in your test, not identical. Different
offsets, different array...
If them two are
2011 Jul 06
2
[LLVMdev] code generation removes duplicated instructions
Hi Renato,
I am trying to add a intrinsic call between the similar two instructions
which either I'll remove or convert to nop in codegen.
Does that kind of seem appropriate for the purpose here?
Thanks
Daya
On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote:
> On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote:
> > Since I am