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On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > The following is an example code generation for arm and x86 for a same IR > BB. In the x86 code I can see that the same computation is done twice and > result is stored in two different registers and then these two different > registers are used for comparision. Yes, but you shouldn't rely on it, since the

Thank you for replying. Yes. The remaining part of the BB is in splitted basic block. The following is an example code generation for arm and x86 for a same IR BB. In the x86 code I can see that the same computation is done twice and result is stored in two different registers and then these two different registers are used for comparision. By the way I am duplicating instruction and inserting

...of the comparison, the compiler cannot/shouldnot optimize that away by means of DCE or anything else. The same kind of stuff is happening for the following duplication. bb6.split: ; preds = %bb6 %33 = load i32* %32, align 4 %34 = load i32* %i, align 4 %HV4_3 = sub nsw i32 %34, %33 %35 = sub nsw i32 %34, %33 %HV4_2 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %HV4_3 %36 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %35 %LDCmp6 = icmp ne i32* %36, %HV4_2 br i1 %LDCmp6, label %relExit, label %bb6.split.split In the above example...