search for: hongli

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2011 Jun 06
2
[PATCH] Document the method for building the Unicorn gem
>From dcd47a609f4489bb37ce33ea1ce975bb2b3ab160 Mon Sep 17 00:00:00 2001 From: Hongli Lai (Phusion) <hongli at phusion.nl> Date: Mon, 6 Jun 2011 13:36:57 +0200 Subject: [PATCH] Document the method for building the Unicorn gem. Signed-off-by: Hongli Lai (Phusion) <hongli at phusion.nl> --- HACKING | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) di...
2008 Nov 22
0
Where is Hong Kong in maps?
It seems that there is no Hong Kong in maps' world cities. >world.cities[substr(world.cities$name,1,3)=="Hon",] name country.etc pop lat long capital 14623 Honami Japan 26040 33.61 130.68 0 14624 Honaz Turkey 8073 37.75 29.27 0 14625 Honda Colombia 28055 5.19 -74.75 0 14626
2004 Aug 29
0
Your Hong Kong Call Centre
If you are setting up a Call Centre in Hong Kong, our company can provide: 1. Dedicated Hong Kong Fax Line (US$20.00 per month) Unlimited fax receiving and every incoming fax will be converted into TIFF file and forwarded to your email address. 2. Dedicated Hong Kong Phone Line (US$20.00 per month + IDD Charges) Every incoming call will be forwarded to your company phone
2004 Jan 20
1
T400P / T100P with Hong Kong IDA-P Lines
2003 Aug 19
7
[Fwd: Re: Shorewall 1.4.6: common chain rules are applied before policyrules?]
Thank you for your support. The next question: Is there a kind of common chain applied before ACCEPT policy? I want to DROP or REJECT Netbios traffic on most interfaces but do not want to repeat those rules in the rules file. Thanks, Boi -----Th?ng ?i?p chuy?n ti?p----- > From: Tom Eastep <tmeastep@hotmail.com> > To: Le.Hong.Boi@sg.netnam.vn > Subject: Re: Shorewall 1.4.6: common
2016 Dec 29
1
Structure Padding and GetElementPtr
Yes. LLVM types != C++ types. There is no mapping except that produced if you add debug info. On Wed, Dec 28, 2016 at 6:51 PM, Hong Hu via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Here is an example: > > I can define two classes: A and Apad: > > class A { > bool b1, b2; > double d1; > int i1; > }; > > class Apad { > bool b1, b2;
2011 May 12
2
[OT] Co-location center in Singapore or Hong Kong
Apparently my company will potentially need to put in some servers for Asia and is hoping to find a highly reliable data center in either Singapore or Hong Kong if anyone has recommendations. Thanks -- Craig White ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ craig.white at ttiltd.com 1.800.869.6908 ~~~~~~~~~~~~~~~~~~~~~~~~~~~ www.ttiassessments.com Need help communicating between generations at work to
2017 Jan 21
3
Spare Register at one Machine Instruction
I'm not sure exactly what you're after. I was under the impression that you want to know which register is live at a specific point (an instruction). If that's the case, how do one of the two suggested solutions not suffice? If a register is live-in to a block and not killed before your instruction or it has a def and no kill within the block, it is live. Otherwise it is dead and
2007 May 31
5
What makes excel file opening so slow??
Hi list, Despite the question I asked last time (I will re-install the FC3 with Samba 3.0.14a on another computer for replacement soon), I still have one more question on Excel files. I found that Excel file opening is extremely slow (especially on slow connections, i.e. VPN). The case is really bad, it takes around 2 mins to open a excel file of around 400k. Actually we got both side having
2016 Dec 29
1
Structure Padding and GetElementPtr
Yes, Reid. I have used these methods to figure out the layout. Now my question is to build a map between the original layout and the new layout. I show one example below. When LLVM IR access the 4th (starting from 0th) member (i32) of the class A, the map will tell that in fact it is accessing the originally 3rd member (i1). Any suggestion? Regards, Hu Hong On 29 December 2016 at 10:50, Reid
2016 Oct 17
4
LLVM backend -- Avoid base+index address mode for X86
Hi All, I have a question regarding LLVM backend. I appreciate a lot if anyone can provide some hints. My work here is to avoid base+index address mode for X86 target, to allow base-register only or index-register only address mode. For example, "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed. I understand LLVM backend is a complex system. Can any
2016 Oct 17
2
LLVM backend -- Avoid base+index address mode for X86
Hi Bruce, Thanks for you reply. I check the *.td files under the lib/Target/X86 folder, but have not got interesting findings. It requires some knowledge of LLVM backend to fully understand the *.td files. I will get some background and keep searching. Of course I appreciate if anyone with such experience can point the concrete locations. Regards, Hu Hong On 17 October 2016 at 22:20, Bruce
2016 Dec 29
0
Structure Padding and GetElementPtr
Here is an example: I can define two classes: A and Apad: class A { bool b1, b2; double d1; int i1; }; class Apad { bool b1, b2; bool pad1[6]; double d1; int i1; bool pad2[4]; }; A and Apad will have the same layout, from the LLVM IR level: %class.A = type <{ i8, i8, [6 x i8], double, i32, [4 x i8] }> %class.Apad = type { i8, i8, [6 x i8], double, i32, [4
2005 Mar 16
1
Hong Kong DID
Hi there, Anybody on this list knows where I can obtain Hong Kong DID's from ? Cheers, Sahil
2016 Dec 29
4
Structure Padding and GetElementPtr
Thanks, Eli. Next question is how to get the layout of the original C++ class from LLVM IR? Regards, Hu Hong On 29 December 2016 at 01:57, Friedman, Eli <efriedma at codeaurora.org> wrote: > On 12/28/2016 5:41 AM, Hong Hu via llvm-dev wrote: > > Hi all, > > I'm writing a pass to understand the memory access to C++ class members. > For each GetElementPtr instruction,
2010 Jun 04
8
unicorn_rails cleanup (possible fix for Rails3) pushed
Hi all, I''ve pushed the following patch out go git://git.bogomips.org/unicorn along with a few other Rails-related test updates. This is more of a shotgun fix (but less code is better :) since I haven''t been able to reproduce the brokeness people have been seeing with "unicorn_rails" and Rails 3 betas. Even though "unicorn" works perfectly well for Rails3,
2005 Nov 28
3
Looking for constrained optimisation code
_______________________________________________________________________________________ Hi, I was just wondering if there was any available R code that could handle general constrained optimisation problems. At the moment I'm using nlminb and optim, both of which allow box constraints on the parameters, but ideally I'd like to be able to specify more general constraints on the solution
2017 Jan 19
2
Spare Register at one Machine Instruction
There is also the LivePhysReg facility that I would recomment if you just want to query for a free register and do not need the full feature set of the RegisterScavenger. - Matthias > On Jan 19, 2017, at 5:50 AM, Nemanja Ivanovic via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > I believe what you're after is the register scavenger. > It's in:
2004 Aug 26
2
VoIP Telephony with Asterisk book
Does anyone know if there are any reseller for the book "VoIP Telephony with Asterisk" in Hong Kong/Asia region? I'm interested in purchasing the book but the shipping charge to Hong Kong is expensive. Thanks. Joseph -------------- next part -------------- An HTML attachment was scrubbed... URL:
2016 Dec 29
0
Structure Padding and GetElementPtr
Only Clang really knows the original structure layout. You can pass '-Xclang -fdump-record-layouts', though, to see the layout during compilation. The DICompositeType metadata produced when compiling with debug info might contain enough information to describe the original layout. On Wed, Dec 28, 2016 at 6:44 PM, Hong Hu via llvm-dev < llvm-dev at lists.llvm.org> wrote: >