Displaying 10 results from an estimated 10 matches for "hireglist".
2009 Feb 16
3
[LLVMdev] Using CallingConvLower in ARM target
...ustomMem(ValNo, ValVT,
+ State.AllocateStack(4, 4),
+ MVT::i32, LocInfo));
+ return true; // we handled it
Your change isn't handling the "NeededStackSize = 8" case.
++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
+ static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
+
+ if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
+ unsigned i;
+ for (i = 0; i < 2; ++i)
+ if (HiRegList[i] == Reg)
+ break;
+
+ State.addLoc(CCValAssign::getCustomReg...
2009 Feb 18
0
[LLVMdev] Using CallingConvLower in ARM target
...attached two additional test cases. The
difference is that this case isn't handled by the CCCustomFns. They
fail to allocate any regs and then handling falls through to an
CCAssignToStack in ARMCallingConv.td. This is how other targets handle
similar allocations.
> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
> +
> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
> + unsigned i;
> + for (i = 0; i < 2; ++i)
> + if (HiRegList[i] == Reg)
> + break;
> +
>...
2009 Feb 18
2
[LLVMdev] Using CallingConvLower in ARM target
...cases. The
> difference is that this case isn't handled by the CCCustomFns. They
> fail to allocate any regs and then handling falls through to an
> CCAssignToStack in ARMCallingConv.td. This is how other targets handle
> similar allocations.
>
>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>> +
>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
>> + unsigned i;
>> + for (i = 0; i < 2; ++i)
>> + if (HiRegList[i] == Reg)
>>...
2009 Feb 26
0
[LLVMdev] Using CallingConvLower in ARM target
...that this case isn't handled by the CCCustomFns. They
>> fail to allocate any regs and then handling falls through to an
>> CCAssignToStack in ARMCallingConv.td. This is how other targets
>> handle
>> similar allocations.
>>
>>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>>> +
>>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
>>> + unsigned i;
>>> + for (i = 0; i < 2; ++i)
>>> + if (HiRe...
2009 Feb 28
3
[LLVMdev] Using CallingConvLower in ARM target
...;t handled by the CCCustomFns. They
>>> fail to allocate any regs and then handling falls through to an
>>> CCAssignToStack in ARMCallingConv.td. This is how other targets
>>> handle
>>> similar allocations.
>>>
>>>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>>>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>>>> +
>>>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
>>>> + unsigned i;
>>>> + for (i = 0; i < 2; ++i)
>>...
2009 Apr 17
0
[LLVMdev] Using CallingConvLower in ARM target
...>> fail to allocate any regs and then handling falls through to an
>>>>> CCAssignToStack in ARMCallingConv.td. This is how other targets
>>>>> handle
>>>>> similar allocations.
>>>>>
>>>>>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>>>>>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>>>>>> +
>>>>>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList,
>>>>>> 2)) {
>>>>>> + unsigned i...
2009 Apr 16
2
[LLVMdev] Using CallingConvLower in ARM target
...omFns. They
>>>> fail to allocate any regs and then handling falls through to an
>>>> CCAssignToStack in ARMCallingConv.td. This is how other targets
>>>> handle
>>>> similar allocations.
>>>>
>>>>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>>>>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>>>>> +
>>>>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList, 2)) {
>>>>> + unsigned i;
>>>>> + for (i = 0; i &...
2009 Apr 17
1
[LLVMdev] Using CallingConvLower in ARM target
...ocate any regs and then handling falls through to an
>>>>>> CCAssignToStack in ARMCallingConv.td. This is how other targets
>>>>>> handle
>>>>>> similar allocations.
>>>>>>
>>>>>>> ++ static const unsigned HiRegList[] = { ARM::R0, ARM::R2 };
>>>>>>> + static const unsigned LoRegList[] = { ARM::R1, ARM::R3 };
>>>>>>> +
>>>>>>> + if (unsigned Reg = State.AllocateReg(HiRegList, LoRegList,
>>>>>>> 2)) {
>>>>>>...
2009 Feb 14
0
[LLVMdev] Using CallingConvLower in ARM target
Sorry left a small bit of cruft in ARMCallingConv.td. A corrected
patch it attached.
deep
On Fri, Feb 13, 2009 at 6:41 PM, Sandeep Patel <deeppatel1987 at gmail.com> wrote:
> Sure. Updated patches attached.
>
> deep
>
> On Fri, Feb 13, 2009 at 5:47 PM, Evan Cheng <evan.cheng at apple.com> wrote:
>>
>> On Feb 13, 2009, at 4:25 PM, Sandeep Patel wrote:
2009 Feb 14
2
[LLVMdev] Using CallingConvLower in ARM target
Sure. Updated patches attached.
deep
On Fri, Feb 13, 2009 at 5:47 PM, Evan Cheng <evan.cheng at apple.com> wrote:
>
> On Feb 13, 2009, at 4:25 PM, Sandeep Patel wrote:
>
>> ARMTargetLowering doesn't need case #1, but it seemed like you and Dan
>> wanted a more generic way to inject C++ code into the process so I
>> tried to make the mechanism a bit more